Senior FPGA or ASIC Engineer

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MITRE's Electronic Systems Development department is seeking to hire talented engineers with a background in FPGA and/or ASIC design to support advanced research and development projects of national significance. Qualified candidates will join a multi-disciplinary team to help support the design and implementation of proof-of-concept prototype systems on embedded hardware platforms. Our diverse set of sponsors and research objectives provide a wide variety of interesting work opportunities such as:

• Real-time communication and sensor systems leveraging cutting-edge FPGA technology and SDR platforms
• Advanced architectures for high throughput signal processing algorithms
• Tightly integrated, custom platforms targeting low size, weight, power and cost (SWaP-C) applications
• Cross-disciplinary teams of similarly bright and motivated engineers on projects of national importance

Roles & Responsibilities:

Our team specializes in rapid prototyping of advanced sensor, communication, and navigation systems on state-of-the-art embedded system platforms. This position provides an exciting opportunity to work on the following:

• Component development across FPGA and ASIC technologies
• Implementation of algorithms in SW/HW on embedded systems

Basic Qualifications:

We are interested in highly motivated candidates with a wide variety of skills, insatiable curiosity, enthusiasm, and the ability and interest to dig deep on challenging technical problems. Minimum qualifications include:

• Typically requires a minimum of 5 years of related experience with a Bachelor's degree; or 3 years and a Master's degree; or a PhD with relevant experience who can immediately contribute at this job step; or equivalent combination of related education and work experience.
• Candidates should have a strong foundation in programming and experience with one or more RTL languages such as VHDL, Verilog/System Verilog, and a solid background with RTL synthesis and simulation tools
• Experience implementing complex embedded systems
• Experience with industry standard best practices for design, verification, test, and deployment
• Experience integrating third-party Intellectual Property (IP) into custom designs
• Excellent oral and written communication skills
• Capable of obtaining and maintaining a DoD Secret security clearance
• This position requires a minimum of 4 days a week on-site

Preferred Qualifications:

• M.S. or PhD in Electrical and/or Computer Engineering or similar field
• Experience deploying on cutting-edge, reconfigurable SoC platforms (AMD Xilinx MPSoC, AMD Xilinx RFSoC, AMD Xilinx Versal, Intel Agilex SoC)
• Experience working across all phases of digital design, including architecture, implementation, verification, test, documentation, and version control
• Exposure to leading edge process nodes and foundries including GlobalFoundries, Intel, and TSMC
• Solid understanding of processor interface techniques such as memory mapped peripherals and interrupts
• Experience with scripting languages and build tools (TCL, Python, CMake)
• Understanding of microelectronic circuits and transistors
• Experience in EDA ASIC design tools including synthesis, timing closure, and place & route
• Basic understanding of signal processing concepts and exposure to MATLAB
• Demonstrated technical leadership in FPGA design and verification methodologies (UVM, OVM)
• Exposure to hardware emulation platforms such as Cadence Palladium and Siemens Veloce

This requisition requires the candidate to have a minimum of the following clearance(s):
None

This requisition requires the hired candidate to have or obtain, within one year from the date of hire, the following clearance(s):
Secret

Salary compensation range and midpoint:
$126,800 - $158,500 - $190,200 Annual

Work Location Type:
Onsite

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Commitment to Non-Discrimination

All qualified applicants will receive consideration for employment without regard to disability, status as a protected veteran or any other status protected by applicable federal, state, local or international law.

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