Photonic System Design Engineer

Key Responsibilities

• Architect, design and simulate new system-level and component-level photonics solutions
• Develop and perform end-to-end system level link simulations with high-speed silicon photonic components.
• Identify system-level tradeoffs and component performance optimization opportunities
• Define system specifications driving component development and tradeoffs
• Work cross-organizationally to validate photonic link and system understanding with experiment, implement system-level solutions, and drive engineering requirements decisions

Minimum Qualifications

• Master's degree in Electrical Engineering, Physics, or a similar discipline with focus on Silicon Photonics, optical component, module, and transmission system with 6+ years of industry experience listed below OR a PhD in Electrical Engineering, Physics, or a similar discipline with focus on Silicon Photonics, optical component, module, and transmission system with 4+ years of industry experience listed below.
• Experience in system link modeling and design methodology and tools for high speed (50GBaud to 200GBaud) optical communication transceivers and CPO/OCI engine products, both experimental/theoretical performance analysis, and optical components and system optimizations.
• Experience in architecting, designing and defining new systems and components for high-speed silicon photonics commercial optical communication products.
• Experience with modeling both direct detect higher order modulation format systems, advanced modulation formats, noncoherent and coherent optical systems (ie, modulators, detectors, lasers).
• Experience with optical/electrical simulation platforms Simulink, Matlab, ADS, Lumerical, HFSS, VPI, etc.

Preferred Qualifications

• Experience modeling in transmitter, receiver, analog and Serdes interactions, Si and III-V photonic devices, subsystems in high-speed optical communication systems.
• Experience with co-simulating high-speed electronics with optical components, DSP modeling, coding/decoding techniques, OSNR/BER/FEC error correction, CMOS IC's (driver, TIA's), and advanced modulation formats.
• Experience in designing high speed optoelectronic and electronic components.
• Experience in component, carrier, RF package, driver-modulator optimization, high-speed interconnect digital and analog system, DSP and FEC.
• Exposure in optical system-, subsystem-, and component-level characterization.
• Exposure to optical packaging concepts 2D, 2.5D, 3D and optical test.
• Experience in designing high speed optoelectronic and electronic components.

Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations:

Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $164,470.00-269,100.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

* Job posting details (such as work model, location or time type) are subject to change.

* ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter. Intel’s official careers website. Find your next job and take on projects that shape tomorrow’s technology. Benefits Internships Life at Intel Locations Recruitment Process