Lead Verification Architect - DDR6 & Memory Interfaces
Jobleads-US
Renesas Electronics Corporation seeks a Principal Design Verification Engineer to lead verification for next‑generation DDR6 memory interface products. You will own verification strategy at block and system levels, architect SystemVerilog/UVM testbenches, and drive coverage closure with RTL teams for high‑assurance designs.
You will mentor verification engineers, shape verification plans, and communicate risks and progress to leadership.
#J-18808-Ljbffr Jobleads-USVacancy posted 1 day ago
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