Compiler Engineer

About The compiler is the product. BoolSi turns a hotspot in C, C++, or Rust into custom hardware accelerators and the drivers to run it: no HDL, no chip‑design team in the loop. You own the front‑end, everything between a developer's source code and the ML pipeline that converts it into hardware. The twist is that we compile a program's behavior, not its text. A trained model converges into an exact digital circuit (that's the ML team), and our computer architects carry that circuit the rest of the way onto the fabric. You don't write RTL or close timing in Vivado. You work on the software side of the seam: ingest arbitrary high‑level code, isolate the hotspot, prove the properties that make it safe to lower, and replace the source with a same‑signature driver that talks to the hardware. Software is sequential; hardware is spatial. You stand between them, translating what a program means into something a circuit can be trained to match, then hand it off clean to the people who build the silicon. Done right, the front‑end is what puts custom hardware within reach of the ten million software developers who will never touch an HDL. Scope Grow the front‑end to swallow ever more of what real programs do (language features, patterns, whole classes of user code), toward the goal of compiling anything a developer hands us. Analyze and prove properties about user functions: what they touch, what they assume, and what makes them safe and sound to lower onto hardware. Build white‑box fuzzers and data‑generation harnesses that exploit the structure of the input program to produce the training signal the model learns from. Design program transformations: insert probes, decompose a hotspot into composable sub‑programs, and reshape code into a form the model can converge on. Extract and operate on program representations: CFGs, DFGs, and the IR that everything downstream depends on. Define the contract with the ML team and the computer architects, so what you hand off compiles cleanly to hardware, without owning circuit correctness or quality yourself. Fit Strong C and C++, with a real grasp of language semantics, undefined behavior, and what a compiler is and isn’t allowed to assume. Hands‑on compiler internals (LLVM, GCC, MLIR, or comparable): IR design, pass management, and program analysis. Solid analysis fundamentals: SSA, data‑flow, control‑and data‑flow graphs, abstract interpretation. Experience building tools that read and rewrite real code: instrumentation, transformation passes, fuzzers, or test generation. Enough hardware fluency to work with the architects (the basic shape of an FPGA, why spatial compute is different) without needing to write RTL yourself. Strong debugging instincts and the discipline to make a flaky pipeline reproducible. A degree in CS, CE, or EE, or equivalent experience shipping a real toolchain. Nice to have Formal verification, equivalence checking, or abstract interpretation applied to real programs. White‑box or coverage‑guided fuzzing, symbolic or concolic execution, automated test generation. Program instrumentation and dynamic analysis: sanitizers, tracing, profilers. Polyhedral optimization, auto‑vectorization, or ML‑guided compilation. Open‑source compiler contributions. LLVM or MLIR upstream is a strong plus. Familiarity with FPGA or HLS flows (Vivado, Vitis HLS), not because you'll live in them, but because you'll be handing work to the people who do. A screenshot of your Factorio megabase #J-18808-Ljbffr BoolSi