Design tech - engineering

Qualcomm Technologies, Inc.
Engineering Group, Engineering Group
ASICS Engineering
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drive communication and data processing transformation, helping create a smarter, more connected future for all.
Qualcomm is seeking talented Physical Design Engineers to join our growing SoC and ASIC Design organization. Successful candidates will have the opportunity to contribute across a variety of projects spanning high-performance computing, AI, mobile, automotive, data center, and next-generation semiconductor technologies. Engineers in this role may work on different aspects of Physical Design ASIC and SoC development, including floorplan, Clock Tree Synthesis, low power implementation, timing analysis, design methodology, automation and enabling new technology nodes.
This is an excellent opportunity to join a fast-paced engineering team developing leading-edge products on advanced process technologies while collaborating with world-class design, verification, implementation, and physical design teams.
Execute and drive all stages of the physical design flow from synthesized netlist to tape-out.
Develop and implement physical design solutions for complex, high-speed, and low-power ASICs and SoCs.
Perform floorplanning, partitioning, power planning, and IR-drop analysis.
Execute placement, clock tree synthesis (CTS), routing, timing optimization, and timing closure across Multi-Mode Multi-Corner (MMMC) scenarios.
Analyze and resolve timing violations, signal integrity issues, crosstalk effects, and physical design rule violations.
Implement engineering change orders (ECOs) and support design convergence through sign-off.
Collaborate with architecture, RTL, DFT, verification, and methodology teams to ensure successful project execution.
Contribute to the development of innovative low-power implementation methodologies and customized place-and-route solutions.
Develop automation and productivity tools using scripting languages and software development techniques.
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
~10+ years of industry experience or relevant academic/project experience in Physical Design.

ASIC/SoC Physical Design implementation.
Static Timing Analysis and timing closure using Synopsys PrimeTime SI.
Physical verification and design sign-off methodologies.
Power domain implementation and low-power design methodologies.
Clock Tree Synthesis (CTS), routing, and timing optimization.
Low power implementation techniques experience
Signal integrity, noise analysis, and MMMC sign-off flows.
DFT-aware physical implementation and constraint management.
Programming and automation using Python, Perl, TCL, Shell scripting, C/C++, and Linux/Unix environments.
Perl/Tcl, Python skills are needed.
Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
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all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play.