Integration Engineering

SamsungAustinSemiconductor is seeking a highly experienced DeviceEngineer to join its cutting‑edge 2nm Gate‑All‑Around (GAA) device engineering team.
Role and Responsibilities Perform split‑lot design and DOE analysis to identify key process knobs impacting device performance and yield.
Collaborate with integration and module teams to resolve device‑process interactions and define optimization paths.
Lead root‑cause analysis for device failures and non‑conformances; drive corrective actions across fab operations.
Drive task‑force teams to solve systematic yield, performance, or reliability issues.
Ensure targeting of transistor‑focused Electrical Test (ET) trends to customer/product specifications and conduct timely root‑cause studies on shifts or abnormalities.
Analyze process interactions (inline metrology, FDC, etc.) with ET while understanding ET data effects on parametric yield.
Own parametric yield and wafer acceptance Electrical Test (WAT) management for one or more customer accounts/products.
Support unit process or process‑integration teams with evaluation of device impact for key change points (e.g., performance or yield improvement activities).
Generate written reports and oral presentations for internal management, external teams, and company executives.
Conduct Local Layout Effects (LLE) analysis to characterize and mitigate transistor performance variability driven by neighboring pattern density in GAA nanosheet devices.
Lead Material‑to‑Hardware Correlation (MHC) task force to link upstream material and process metrology data (film composition, stress, defectivity) to final electrical device performance, enabling predictive process control and accelerating yield ramp at the 2nm node.
Skills and Qualifications Bachelor of Science or Engineering (Electrical, Computer, Chemical, Material Science, or related areas) required; Master’s or PhD a plus.
3-8 years of relevant experience; 5+ years of industry experience preferred.
Understanding of process and electrical test interactions.
Knowledge of process flow and familiarity with unit processes including thin‑film deposition, etch, diffusion, wet process, CMP, lithography, implant, anneal, etc.
Proficiency in data mining, DOE, and SPC; Spotfire experience highly preferred.
SPICE modeling and simulation experience preferred.
Excellent communication, documentation, and presentation skills.
Ability to shift focus, meet deadlines, and manage multiple priorities in a fast‑paced environment.
Independent judgment and decision‑making capability; capable of working effectively with little supervision and under high stress and conflict situations.
Strong interpersonal skills and ability to engage with diverse stakeholders.
Compensation and Benefits Base salary range: $106,000 - $206,000, plus a competitive benefits package and potential incentive compensation based on performance.
Medical, dental, and vision insurance
Life insurance and 401(k) matching with immediate vesting
Onsite café and workout facilities
Paid maternity and paternity leave
Paid time off (PTO) + 2 personal holidays and 10 regular holidays
Wellness incentives
Eligible employees may receive MBO bonuses based on company, division, and individual performance
Equal Employment Opportunity Statement Samsung Electronics America, Inc. and its subsidiaries are committed to employing a diverse workforce, and provide equal employment opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.

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