Optical Engineering Tech

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.

HIGH-SPEED ELECTRO-OPTICAL IC ENGINEER (RFIC ENGINEERING)

At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe.

We are seeking a motivated, proactive, and intellectually curious Electrical-optical Silicon photonics IC engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering). In this role, you will be developing cutting-edge next-generation PIC/EIC for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has not previously been available, affordable or reliable. Join us to help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.

RESPONSIBILITIES:

Design, analyze and simulate drivers for MZM and laser diodes

Design analyze and simulate TIAs and derive models for PDs (Ge Photo diodes)

Derive specifications for the entire electro-optical system and circuits

Design and model package for elecrto-optical components and systems

Develop Analog/Mixed-Signal/RF/Microwave circuits in SiGe, FDSOI, or silicon bulk CMOS processes

Work with system architects, DSP/ASIC designers and PIC designers to partition functions between hardware, software, and optical domains

Perform IC floor planning and layout

Simulate and model package and external discrete components

Evaluate, characterize and measure electrical and optical building blocks of a high-speed optical link solution

Assist in the development of automated test setups and test programs for production and lab measurements

Work with manufacturing engineers on production testing and qualification of the EIC/PIC components and systems

BASIC QUALIFICATIONS:

• Bachelor's degree in electrical engineering, computer engineering, or computer science
• 2+ years of photonics or electro-optical integrated circuit design

PREFERRED SKILLS AND EXPERIENCE:

Master's degree or PhD in physics, electrical engineering or computer engineering with an emphasis in electro-optics integrated circuit design

Experience using simulation tools such as Spectre, ADS, HFSS or Momentum, Ansys Lumerical, COMSOL

Understanding of silicon photonics designs, and familiarity with optical building blocks such as MZM and Microring modulators, Ge Photo diodes, dWDM filters, waveguides, couplers, dividers and polarization management circuitry

Electrical circuit design skills for mmWave or broadband analog, and experience performing analysis and simulation of both linear and non-linear circuits such as high bandwidth modulator drivers, TIAs, CTLEs, filters, low noise and power amplifiers

Knowledge of advanced packaging technology for high-speed data links

Experience working on wideband circuit designs supporting high speed Serdes links with more than 80Gbps data rate and bandwidths exceeding 10s of GHz

Familiarity with high speed SerDes architecture, modulation schemes such as NRZ and PAM4 and link protocols

Familiarity with optical and radio related test equipment such as spectrum analyzers, vector signal analyzers, vector signal generators, high speed oscilloscopes and BERTs

Experience characterizing EIC/PIC performance for high speed optical Serdes

Fluency with programming in either C/C++ or Python

ADDITIONAL REQUIREMENTS:

Ability to work long hours and weekends as necessary to support critical milestones

This role can be based in Palo Alto, CA or Redmond, WA

COMPENSATION AND BENEFITS:

Pay Range:

Level 1: $135,000.00 - $175,000.00

Level 2: $155,000.00 - $210,000.00

Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.

Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short and long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation and will be eligible for 10 or more paid holidays per year. Employees accrue paid sick leave pursuant to Company policy which satisfies or exceeds the accrual, carryover, and use requirements of the law.

ITAR REQUIREMENTS:

Learn more about the ITAR here. SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

Applicants wishing to view a copy of SpaceX's Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to