Communications engineering

Would you be excited to build communications/networking architectures across hardware/firmware/software boundaries?

Are you interested in trying novel, creative, and risky approaches for communications systems to solve and overcome mission critical challenges?

We are seeking an RF Communications Engineer to contribute to communications system design, implementation, hardware test/evaluation, FPGA firmware, real-time embedded software, and more. As part of our team, you will make critical contributions to both new and legacy communications systems and work on a variety of projects in a fast‑paced environment.

Work with multi‑disciplinary teams in designing, implementing, and analyzing systems/algorithms for future resilient, secure, and adaptive communications networks operating in highly contested environments

Develop FPGA firmware (VHDL) from concept through implementation, evaluation, and deployment

Contribute to MATLAB modeling and simulation

Validate and analyze performance of prototypes and tactical systems against complex operational scenarios

Work as part of a team to design novel solutions and approaches for size/weight/power/cost (SWaP‑C) constrained communications concepts

Provide status updates, analysis results, and algorithms in written reports and in presentations to internal APL staff, program contractors, and government sponsors

Support occasional field tests for hardware testing

Have a BS degree in Computer Engineering, Electrical Engineering, Computer Science, or related discipline

Have 3+ years of experience in communications system design and digital signal processing

Have demonstrated experience in FPGA/firmware implementation of transceivers, link‑level algorithms, and communications hardware architectures

Have understanding of system link budgets and analysis related to communications/RF systems

Have strong knowledge of RF system design principles, with hands‑on experience using RF hardware and test equipment

Have experience in MATLAB and/or Python for algorithm development, modeling, and simulation

Have strong experience with FPGA firmware design and development using VHDL and/or Verilog

Are able to obtain Interim Secret security clearance by your start date and can ultimately obtain Secret security clearance. Have an MS degree in Computer Engineering, Electrical Engineering, Computer Science, or related discipline

Have professional experience with designing fast and adaptive wireless modems and/or networking protocols

Have a deep understanding of wireless communications concepts (OFDM, MIMO, etc.)

Have experience implementing advanced concepts on FPGA such as transceivers, estimators, adaptive filtering techniques, error correction codes, etc.

CDL, LINK16/MIDS)

Have experience with satellite communications systems

familiarity with Petalinux/Yocto and C/C++ embedded programming experience

Have an active Secret security clearance

The Johns Hopkins University Applied Physics Laboratory (APL) brings world‑class expertise to our nation’s most critical defense, security, space and science challenges. While we are dedicated to solving complex challenges and pioneering new technologies, what makes us truly outstanding is our culture. Our employees enjoy generous benefits, including a robust education assistance program, unparalleled retirement contributions, and a healthy work/life balance. All qualified applicants will receive consideration for employment without regard to race, creed, color, religion, sex, gender identity or expression, sexual orientation, national origin, age, physical or mental disability, genetic information, veteran status, occupation, marital or familial status, political opinion, personal appearance, or any other characteristic protected by applicable law. APL is committed to providing reasonable accommodation to individuals of all abilities, including those with disabilities. The referenced pay range is based on JHU APL’s good faith belief at the time of posting. Actual compensation may vary based on factors such as geographic location, work experience, market conditions, education/training and skill level with consideration for internal parity. APL may offer bonuses or other forms of compensation per internal policy and/or contractual designation. Additional compensation may be provided in the form of a sign‑on bonus, relocation benefits, locality allowance or discretionary payments for exceptional performance. APL provides eligible staff with a comprehensive benefits package including retirement plans, paid time off, medical, dental, vision, life insurance, short‑term disability, long‑term disability, flexible spending accounts, education assistance, and training and development. Applications are accepted on a rolling basis.

J-18808-Ljbffr Johns Hopkins Applied Physics Laboratory