Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

Senior IC Design & Signoff Architect 3nm+

Cadence Inc

Cadence is seeking an Architect for its North America Field Applications Team. This role involves technical leadership in EDA & Agentic-AI solutions, driving customer success and collaboration with design teams to deliver cutting-edge design solutions. The position requires 15+ years of IC design experience, deep expertise in digital design, and proficiency in scripting languages. A competitive salary, bonuses, and a comprehensive benefits package are available. #J-18808-Ljbffr

Vacancy posted 4 days ago
Similar jobs that could be interesting for youBased on the Senior IC Design & Signoff Architect 3nm+ in San Jose, CA vacancy
  •  ...Cadence Design Systems in California seeks a Senior Principal Application Engineer to lead complex pre-sales and post-sales engagements for Cadence Digital IC products at advanced nodes. You will solve design challenges and deliver innovative solutions to ensure customer... 
    Senior

    Cadence Design Systems

    San Jose, CA
    1 day ago
  •  ...Ethernovia, Inc. seeks a visionary Principal IC Package Design Engineer to lead architecture and execution of advanced packaging for next-gen Ethernet switches and PHYs. You will own the package lifecycle from feasibility to mass production, collaborating with Silicon... 
    Senior

    Ethernovia, Inc.

    San Jose, CA
    3 days ago
  •  ...Axiado is seeking a Senior IC Packaging Engineer to lead architectural ownership of advanced IC/SiP packaging in a fast-growing startup...  ...in packaging, Deep FCBGA/SiP experience, and a strong grasp of design-for-manufacturing and reliability considerations in a high-ambiguity... 
    Senior

    Axiado

    San Jose, CA
    5 days ago
  • $168k - $264.5k

     ...We are seeking an innovative Senior STA Signoff Methodology Engineer to help...  ...technology nodes as deep as 3nm and beyond, this is an ideal...  ...with technology leads, physical-design engineers, and timing engineers...  ...crowd:Familiarity with 3D IC integration, die stacking and... 
    Senior
    Full time

    Nvidia

    Santa Clara, CA
    2 days ago
  • $148.4k - $275.6k

     ...Description Summary The Senior Principal Application...  ...engagements for Cadence Digital IC products at advanced...  ...to solve the toughest design challenges and deliver...  ...flows at advanced nodes (3nm and below) Partner...  ...implementation, Agentic-AI and signoff, leveraging deep... 
    Senior

    Cadence Design Systems

    San Jose, CA
    2 days ago
  •  ...from self-driving cars to learning machines. We lead in chip design, signoff, verification, and IP integration, empowering the creation of...  ...opportunities, define product strategy, and drive customer success. As a senior technical product manager, you will play a key role in... 
    Senior
    Shift work

    Synopsys, Inc.

    Sunnyvale, CA
    8 hours ago
  • $157.5k - $292.5k

     ...the world of technology. The Architect will serve as a technical leader...  ...depth, hands‑on experience of design convergence, and the ability...  ...features across advanced nodes (3nm and below). Partner with R&...  ...~15+ years of experience in IC design implementation and sign... 

    Cadence Design Systems

    San Jose, CA
    8 hours ago
  •  ...Solutions, Milpitas, CA Job Description: MACOM is a leading designer and manufacturer of semiconductor products for Data Center,...  ...design lifecycle from concept to release. Simulate and design IC circuits based on device models and design rules. Conduct RF... 
    Senior

    AnySilicon

    Milpitas, CA
    1 day ago
  • $280k

    RTL IC Design Engineer (Senior, Staff or Principal)Compensation:For Senior - up to approx $280k total comp ($120-160k base, 20% bonus + RSUs)For Staff - up to approx $400k total comp ($150-190k base, 25% bonus + RSUs)For Principal - up to approx $580k total comp ($180-... 
    Senior

    CyberCoders

    San Jose, CA
    3 days ago
  • $231.5k - $341.08k

     ...of process technology and design methodology to deliver silicon...  ...Design Implementation & Signoff Methodology Lead & Architect to own and reinvent the implementation...  ...at Altera. This is a senior individual-contributor role...  ...individual-contributor (IC) technical ladder (Senior... 
    Local area
    Shift work

    191 Altera Corporation

    San Jose, CA
    8 hours ago
  •  ...Engineer in San Jose to lead verification for power-management ICs. You will develop metric-driven plans, create constrained-random...  ...build models to support TL simulations, collaborating closely with design and test teams to ensure first-pass silicon success. The role... 
    Senior

    Qorvo

    San Jose, CA
    5 days ago
  • $161k - $299k

     ...and Post–sales activities at advanced nodes for Cadence Digital IC products. Key Responsibilities Provide technical support to Cadence customers in the areas of Digital Design Implementation & Signoff including Synthesis, Place and Route, Design Closure, and... 
    Senior

    Cadence Design Systems

    San Jose, CA
    8 hours ago
  •  ...Samsung Austin Research and Development Center in San Jose is seeking a Staff GPU Memory Architect to define and implement next‑generation memory subsystems for Exynos GPUs. In this senior IC role you will drive memory hierarchies, on‑chip interconnects, and performance... 
    Senior
    Relocation package

    Samsung Electronics Perú

    San Jose, CA
    3 days ago
  • $148.4k - $275.6k

     .... As an expert Digital Implementation and Signoff Field Applications Engineering (AE) , you...  .../exceed their PPA targets, achieve faster design closure, and turn their design concepts into...  ...is required Prior experience with IC digital implementation flows and backend EDA... 
    Senior

    Cadence Design Systems

    San Jose, CA
    2 days ago
  • $182.36k - $273.2k

     ...Engineering business group. Our group owns the digital design of high performance mixed signal ICs used in high speed interconnects in hyperscaler data...  ...circuits.• Work closely with system and chip architects to design industrial quality implementations.• Participate... 
    Senior
    Permanent employment
    Full time
    Internship
    Work from home

    Marvell

    Santa Clara, CA
    1 day ago
  •  ...networking. You will shape multi‑year hardware architecture and design standards, guiding cross‑functional teams across IC, board design, and systems disciplines to ensure successful product releases. As a Senior Technical Lead, you will drive technology roadmaps,... 
    Senior

    Cisco

    Milpitas, CA
    5 days ago
  •  ...Etched is building a new category of AI hardware in San Jose, focused on frontier inference clusters. As a Physical Design Methodology Engineer, you will own the PD flow from first principles, creating infrastructure that lets design teams iterate rapidly and yield strong... 
    Senior

    The Consensus

    San Jose, CA
    4 days ago
  •  ...Silicon Solutions Group and act as a quality champion for multiple design teams. You will analyze defects, define QA and QC processes, and...  ...with agentic AI systems while reporting quality metrics to senior management. You will help sustain ISO 9001 and ISO 26262 certifications... 
    Senior

    Cadence Inc

    San Jose, CA
    4 days ago
  • $232k - $368k

     ...choice and join us today!NVIDIA's Mixed-Signal Design (MSD) Photonics team is building the next...  ...We are looking for a Principal Photonics IC Design Engineer to serve as the technical...  ...driven PICs from design through GDS signoff on a foundry silicon photonics processStrong... 
    Full time

    Nvidia

    Santa Clara, CA
    5 days ago
  •  ...MACOM is seeking a Senior Electronic IC Design Engineer in Milpitas, CA to design state-of-the-art circuits for serial communications. The role requires a strong background in analog and high-frequency design, with experience in CMOS/BiCMOS processes and related EDA tools... 
    Senior

    MACOM

    Milpitas, CA
    5 days ago
  • $210.87k - $329.86k

     ...improve engineering productivity, reduce manual effort, accelerate development cycles, and improve design quality and first-time-right execution.We are seeking a senior AI Architect - Hardware Engineering to lead this transformation.The AI Architect will define and drive the... 
    Senior
    Temporary work
    Local area
    Worldwide
    Shift work

    Celestica

    San Jose, CA
    1 day ago
  •  ...Apple Inc. is seeking an innovative IC Designer based in Cupertino, California. This role involves crafting analog designs for upcoming products, validating architectures, and driving design implementations. Candidates should possess a Bachelor's degree in Electrical Engineering... 
    Senior

    Apple Inc.

    Cupertino, CA
    8 hours ago
  •  ...gen machine learning and data center ASICs. You will drive 2.5D/3D-IC packaging decisions spanning die-to-die interfaces and board...  ...and EMIR validation using HFSS, Sigrity, and Cadence tools, translating results into robust design guidelines and flows. #J-18808-Ljbffr... 
    Senior

    Amazon

    Cupertino, CA
    4 days ago
  •  ...regulator devices for consumer electronics. You will collaborate with Design, Applications, Test, Marketing, Manufacturing, Quality and...  ...conception to release. The role emphasizes evaluating and debugging ICs, working with failure analysis, and coordinating with process... 
    Senior

    Texas Instruments

    Santa Clara, CA
    1 day ago
  •  ...Broadcom Inc. in California seeks an experienced IC design engineer to translate marketing requirements into block-level design specifications. You will handle timing constraints, HDL coding, and verification planning for high-speed data interfaces. The role involves... 
    Senior

    Broadcom Corporation

    San Jose, CA
    1 day ago
  •  ...Analog Devices, Inc. in Milpitas, CA seeks a Principal Power IC Chip Lead to spearhead high-performance power delivery designs on cutting-edge FinFET processes. The role involves architecting, designing, and optimizing advanced power delivery systems from concept through... 
    Senior

    Analog Devices

    Milpitas, CA
    5 days ago
  •  ...Lumilens is seeking a Senior Physical Design Engineer to join our silicon design team, developing high‑performance ASICs on 5nm and 3nm TSMC nodes. You will own physical implementation from RTL to GDSII and drive timing and power closure for ultra‑high‑speed designs.... 
    Senior

    Lumilens

    San Jose, CA
    4 days ago
  •  ...Triveni IT is seeking a Senior Analog / Mixed-Signal IC Design Engineer to join its semiconductor design team in Santa Clara. You will lead architecture, design, and silicon validation for high-performance analog and mixed-signal blocks, focusing on LNA, ADC architectures... 
    Senior

    Triveni

    Santa Clara, CA
    4 days ago
  • $110k - $300k

     ...skilled Electrical Engineer specializing in analog integrated circuit design. The role involves designing high-performance circuits and...  ...Candidates should possess a strong background in analog/mixed-signal IC development and have at least 5 years of related experience. This... 
    Senior

    TetraMem - Accelerate The World

    San Jose, CA
    4 days ago
  •  ...Intel in Santa Clara, CA seeks a Senior Analog Design Engineer to drive high-speed, mixed-signal IC design for silicon photonics and optical interconnects. You will architect, implement, and validate analog blocks, collaborating with digital and design teams to meet power... 
    Senior

    Intel

    Santa Clara, CA
    4 days ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to Senior IC Design & Signoff Architect 3nm+. Be the first to apply!