Packaging Architect
$171k - $272kMediaTek
Job Description MediaTek is seeking a talented and experienced technical leader with expertise in Packaging Architecture, specifically 2.5D/3D/3.5D and STCO. This role involves close collaboration with cross‑functional teams, including IP, ASIC Design, Package Design, Signal Integrity, Power Integrity, Thermal, thermomechanical, product engineering, Test, and system team. The goal is to develop advanced packaging architecture and guide the development of innovative packaging solutions for automotive, datacenter/HPC, and computing applications. The ideal candidate will play a key role in identifying the optimal package architecture and key packaging technologies, establishing 3rd party relationships, communicating with partners and addressing challenges in areas such as 2.5D/3D/3.5D and system technology optimization with advanced Si nodes, including but not limited to CoWoS‑S/R/L, EMIB/EMIB‑T, SoIC, HBM, FCBGA, and HBPOP. The candidate should demonstrate ownership, high standards, strategic thinking, and customer obsession. Roles and Responsibilities Identify the optimal package architecture by balancing electrical, thermal, and mechanical performance, meeting project’s timeline. Working closely with internal and external partners on silicon‑disaggregation and other chiplet strategies for advanced packages, including emerging‑memory chiplet integration. Perform a trade‑off analysis across silicon layout, die‑to‑die connectivity options, and package design/technology, evaluating their impact on key product metrics, including performance, cost, manufacturability, power efficiency, and form factor. Identifying critical elements for packaging roadmap, partner with supply chain engineering experts to define packaging technology and material requirements for substrate fabrication, assembly, and raw material vendors. Stay informed about emerging packaging architectures by engaging with the product team and customers in the data center and high‑end compute segments. Continuously monitor the competitive landscape in packaging technologies and solutions. Qualifications Extensive hands‑on experience (8+ years) in advanced semiconductor package architecture, including 2.5D/3D/3.5D, CoWoS‑S/R/L, EMIB/EMIB‑T, SoIC, HBM, FCBGA, HBPOP, and related technologies. Extensive experience in characterization and design of 2D, 2.5D, & 3D flip‑chip & wafer‑scale packaging solutions; experience in the areas of power‑signal integrity, thermal‑mechanical & system engineering domains. Proven track record of bringing up successful packages/products with high power and high bandwidth applications from inception to product introduction. Extensive experience with high‑speed interfaces, including SERDES, PCIe, die‑to‑die (D2D) interconnects and CPO & CPC, with a strong understanding of their impact on packaging technology choices, such as substrate selection, interconnect architecture, signal integrity, CPO & CPC integration, and thermal considerations. Experience in HBM on package integration, DDR integration, and working knowledge of various memory types. Experience in various EDA & CAD tools. Excellent communication skills. About 10-15% international travel required. Salary range: $171,000 - $272,000. Employee may be eligible for performance bonus, short- and long‑term incentive programs. Actual total compensation will be dependent upon the individual's skills, experience, and qualifications. MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, company‑paid holidays, sick leave, vacation time, parental leave, 401(k) and more. MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity for all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation. #J-18808-Ljbffr MediaTek
$177k - $387k
...learn, communicate and advance faster than ever.We explore what’s next before constraints take over. Our architecture team defines package concepts that enable future memory and system products, influencing roadmaps long before execution begins.This is a hands‑on architecture...SuggestedFull timeLocal areaImmediate start$208k - $364k
...memory powers the future of AI! Our team brings together system architects, product innovators, and technologists to push the boundaries... ...in high-performance computingExperience with TSV, stacked packaging, or 3D packaging technologiesExposure to hardware/software co-...SuggestedFull timeLocal areaImmediate start$272k - $431.25k
...on power delivery/regulators, power gating, di/dt, and thermal throttling.Analyze power trade-offs for different die stacking and packaging proposals.Propose and drive improvements related to power and power methodology for our custom CPU cores.What we need to see:BS/MS...SuggestedFull time$232k - $368k
...the Silicon Co-Design Group (SCG). We are hiring a Principal Architect to scout the research and industry landscape, identify emerging... ...internal research, academia, standards bodies, and silicon, memory, packaging, and platform partners for what is emerging.Build the product...SuggestedFull time$164.47k - $269.1k
...defining the future of high-performance networking silicon. Our team architects next-generation networking solutions that enable hyperscale... ...management flows across chiplets (telemetry, quiescence, package states, throttling), including system-level sequencing and corner...SuggestedFull timeLocal areaImmediate startShift work- Job Overview:At Arm an SoC Architect is a technical role responsible for architecting and designing high-volume, sophisticated, SoC platforms... ..., virtualization, memory hierarchies, sophisticated 2.5D/3D packaging, performance / power modeling & estimation, soft real-time...Work at officeLocal area
- ...tailored for d-Matrix's AI compute engine. We are seeking SoC Architect to lead our SoC Technologies Definition. This exciting opportunity... ...power efficiency, thermal management, memory, interconnects & packaging to deliver exceptional product experiences across our entire...Night shift
$177k - $387k
...memory technology for AI systems. Our team brings together system architects, product innovators, and technologists who are passionate... ..., PHY, and custom SoC/ASIC designExperience with TSV, stacked packaging, or 3D packaging technologiesPreferred Qualifications:Knowledge...Full timeLocal areaImmediate start$320k
...automotive, client, and edge products. As a Senior SoC Product Architect, Memory Ecosystem, you will drive NVIDIA’s external memory... ...collaboration with vendors, exploring novel architectures, signaling, packaging, and power‑management techniques to meet the bandwidth,...Full time$272k - $431.25k
...We are seeking a senior CPU architect with deep experience designing high-performance, high-frequency server-class processors. This role... ...tradeoffs, physical design, process technology, and advanced packaging. What you'll be doing: Bridge the gap between...$209.5k - $299.2k
...flexibility to accelerate innovation. About the Role The DFT Architect at Altera is a senior technical authority responsible for... ...innovation in high‑performance compute, AI acceleration, advanced packaging, and heterogeneous integration. You will own the end‑to‑end...Local areaShift work- ...NVIDIA is seeking a senior CPU architect in Santa Clara to lead high-frequency, server-class processor design, spanning architecture,... ...The role emphasizes power delivery, thermal constraints, and packaging, with extensive experience across SW, RTL, and VLSI disciplines...
- ...talk to you. What you'll do: As a Senior Power Delivery Architect, you will be responsible for designing the complete power delivery... ...evaluating and deploying high-frequency, multi-phase VRMs, Co-packaged Voltage Regulators (CPVR), and Vertical Power Delivery (VPD)...Flexible hours
- ...memory powers the future of AI! Our team brings together system architects, product innovators, and technologists to push the boundaries... ...in high‑performance computing Experience with TSV, stacked packaging, or 3D packaging technologies Exposure to hardware/software co...Local areaRelocation
$200.4k - $286k
...platforms. At Altera, you’ll work alongside world-class engineers to architect next-generation silicon solutions that redefine performance,... ...in collaboration with circuit design, PHY, controller, packaging, signal integrity, and system teams.* Own the solution lifecycle...Local areaShift work$177k - $387k
...AI training and inference. You’ll work closely with industry architects, researchers, and ecosystem partners to uncover bottlenecks, influence... ...PHY, and custom SoC/ASIC design Experience with TSV, stacked packaging, or 3D packaging technologies Preferred Qualifications...Local area$208k - $364k
...memory powers the future of AI! Our team brings together system architects, product innovators, and technologists to push the boundaries... ...in high-performance computing* Experience with TSV, stacked packaging, or 3D packaging technologies* Exposure to hardware/software co...Full timeLocal areaImmediate start$177k - $387k
Micron Technology is seeking an experienced professional for a role focused on advanced package architectures and package-level simulation in San Jose, California. The ideal candidate will possess at least a Bachelor’s degree and 10+ years of experience in package design...$175k - $350k
High-Speed IO Architect - Digital - PCIe/UCIe/Ethernet Subsystems TylSemi, Inc. San Jose, California, United States About this position... ...power at scale, and move terabits of data without melting the package? That's what we solve. TylSemi builds the chiplet infrastructure...Remote workShift work$171k - $272k
MediaTek Research Lab Inc. in San Jose is looking for an experienced Packaging Architect specializing in advanced semiconductor packaging technologies like 2.5D/3D/3.5D. This position involves collaboration with various teams to develop innovative packaging solutions for...$171k - $272k
MediaTek is seeking a talented and experienced technical leader with expertise in Packaging Architect, specifically 2.5D/3D/3.5D and STCO. This role involves close collaboration with cross-functional teams, including IP, ASIC Design, Package Design, Signal Integrity, Power...Temporary work$175k - $350k
We are seeking a SoC Architect to define and drive the architecture of next‑generation XPUs for AI Infrastructure. This role involves... ...hierarchies). Familiarity with chiplet architectures and advanced packaging (2.5D/3D). Knowledge of coherency protocols (CXL, CHI)....- ...system-level insights into practical memory features. Applicants should have LPDDR/DRAM architecture experience and 12+ years in engineering, with opportunities to mentor juniors and contribute to advanced packaging and industry standards efforts. #J-18808-Ljbffr Micron
$177k - $387k
Responsibilities Define and explore advanced package architectures for future memory systems Perform package‑level trade‑off studies across SI, PI, thermals, cost, and scalability Create hands‑on package designs and models for early feasibility analysis Run SI/PI and...Local area$152.5k - $244k
...semiconductor foundry in San Jose is seeking an experienced engineer to develop defect modeling methodologies and tools for advanced packaging technologies. This role involves collaboration with design and testing teams and demands over 15 years of experience in...- High-Speed IO Architect - PCIe/UCIe/Ethernet Subsystems The Role As the HSIO Architect, you will own the high-speed interface architecture... ...SerDes‑to‑photonics interface, retimer integration, and co‑packaged optics (CPO) readiness. Own the signal integrity budget: TX/...
$211k - $356k
MediaTek is seeking a Compute Subsystem Architect to define and build capability in this space ahead of product commitment. The role covers... ...3D‑IC partitioning trade‑offs, collaborating with dedicated packaging and interconnect teams on interface definitions....Temporary work$171k - $272k
MediaTek is seeking a technical leader with expertise in Packaging Architecture, specifically in 2.5D/3D/3.5D technologies. This role requires collaboration across various teams to develop innovative packaging solutions for automotive, datacenter/HPC, and computing applications...- ...to own and optimize the end-to-end logistics for radioactive products across a thin-capacity carrier network. The role focuses on packaging, routing, documentation, and contingency planning to ensure on-time, in-full delivery and revenue realization. The ideal candidate...
$186.2k - $316.5k
...the manufacturing of wafers and reticles, integrated circuits, packaging, printed circuit boards and flat panel displays. The... ...Technology of RAPID Division is seeking a builder-first AI Engineering Architect to define and deploy AI solutions for EUV source development and...Minimum wageFull timeWork experience placementFlexible hours
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