Principal High-Speed I/O Architect (PCIe, CXL, UA Link)
Arm, Inc.
Job Overview:At Arm, the High-Speed I/O Architect defines and designs innovative on-chip interconnect architectures-coherent and non-coherent-for scalable SoC platforms. You will work across markets including mobile, automotive, datacenter, networking, and IoT, contributing to production-quality silicon with top-tier performance and efficiency. Collaborating with multi-functional teams, you'll shape the interconnect infrastructure that powers next-generation SoCs.Responsibilities:Architect high-speed interconnect subsystems—including PCIe, CXL, and UA Link—and define coherent and non-coherent communication architectures across a range of silicon products.Define IP and subsystem roadmaps for high-speed I/O and interconnect technologies in close partnership with SoC architecture and core technology teams.Lead early architecture engagements with customers, shaping system requirements and delivering clear, implementation-ready specifications.Collaborate with performance, power, and physical design teams to optimize PCIe/CXL/UA Link subsystem behavior, bandwidth, latency, and overall system efficiency.Develop SoC architecture integrating Arm IP and high-speed I/O subsystems to meet compute, memory, and interconnect performance targets.Partner with software, firmware, and platform teams to optimize end-to-end solutions spanning hardware, drivers, and system software.Support detailed use-case exploration, workload analysis, and performance modeling to guide architectural decisions.Required Skills and Experience:8+ years of experience with coherency protocols, hierarchical cache design, and system-level coherency architectures.Deep expertise in PCIe, CXL, and UA Link protocols, including link-level behavior, transaction flows, ordering models, memory expansion/pooling, die-to-die or chiplet connectivity, and host/device integration.Consistent track record collaborating with performance, power, and physical design teams on the PCIe, CXL, and UA Link stack.Strong knowledge in areas such as heterogeneous compute, PCIe/CXL/UA Link subsystem design, security, caching, memory systems.Demonstrated communication and leadership skills with the ability to influence executive stakeholders and multi-functional teams.Bachelor’s or Master’s degree (or equivalent) in Electrical or Computer Engineering with 10+ years of experience in semiconductor architecture, design, or related roles.Nice To Have Skills and Experience:Ability to thrive in dynamic environments with shifting priorities.Constructive, strategic approach to challenge and improve status quo.Track record of delivering complex projects on time and to spec.In Return:This will be a fast paced and exciting environment with opportunities to demonstrate your strategic and innovative thinking while directly chipping in to current projects.Arm is proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work collaboratively to defy ordinary and shape extraordinary!Partner and Customer FocusCollaboration and CommunicationCreativity and InnovationTeam and Personal DevelopmentImpact and InfluenceDeliver on Your PromisesWe will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.Our 10x mindset guides how we engineer, collaborate, and grow. Understand what it means and how to reflect 10x in your work: #LI-MS1 Salary Range:$262,700-$355,400 per yearWe value people as individuals and our dedication is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process.Our 10x MindsetAt Arm, we believe progress happens when people are empowered to think bigger and push beyond what seems possible. Our 10x mindset is about curiosity, ambition and creating impact that will be used by millions. We learn fast, prioritise collaboration and turn bold ideas into real technology. We look for people who are inspired by this way of working and want to grow in an environment where bold ideas are welcomed. Discover how the 10x mindset shapes life at Arm: Use of AI in Your ApplicationAt Arm, we embrace the benefits AI can bring, including in recruitment. You may use AI to support your preparation, such as improving the clarity of written responses, practicing interview questions, or learning more about our industry. However, your application, and interview responses must reflect your own thinking, experience, and abilities. We want to understand your authentic perspective, creativity, and approach to problem solving. As such, you may not use AI to complete assigned tasks as part of any assessments. If you plan to use AI-supported or assistive technologies as part of a reasonable adjustment, please contact View email address on click.appcast.io so we can support you.Recruitment Adjustments and AccommodationsAt Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email View email address on click.appcast.io. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed to the extent necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.Hybrid WorkingArm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.Equal OpportunitiesArm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.
$200k - $250k
Job Title: Principal RTL Design Engineer - PCIe / CXL / High-Speed SoCLocation: Santa Clara, CACompensation: $200K - $250K base DOE plus bonus and RSUs ($300K - $350K+ total comp.)Requirements: RTL Design, Verilog / SystemVerilog, PCIe / CXL / Ethernet / UALink, High-Speed...Principal$164k - $264.5k
...looking for an experienced PCIe Subsystem Architect to help define and deliver high-performance I/O architectures for next... ...candidate is a high-speed interfaces architect... ...across PCIe, CXL, Universal Chiplet Interconnect... ...implications, link training, latency, error...PrincipalWork experience placementWork from home$200k - $250k
Job Title: Principal Design Verification Engineer - PCIe / High-Speed SoCLocation: Santa Clara, CACompensation: $200K - $25... ...rework to meet coverage targets.Architect and implement bring-up and silicon... ...(e.g., protocol analyzers, link-layer tools such as UALink) to accelerate...Principal- ...in Sunnyvale is looking for an expert to develop Speed Adapter solutions that bridge high-speed I/O interfaces and facilitate system-level validation... ...enhancing the adoption of emerging protocols such as PCIe Gen7 and CXL 4.0. Your deep expertise in RTL design and...Suggested
$224k - $356.5k
...now looking for a Senior I/O Architect for our NVLink chip to... ...experience over link layer architecture (Transaction... ...interconnects (PCIE, UCIE, Chip to Chip links... ...standard protocols CHI/CXL/AXIAble to define system... ...opportunity employer. As we highly value diversity in our...SuggestedFull time- ...development of next generation IOs, high speed memory (LPDDRx, gDDRx, HBMx)... ...with System/Platform & SOC architects to translate system level... ...multi-Gbps serial interfaces (PCIE, USB, …), parallel high BW... ...and die-to-die/chip-to-chip links PHY IPsStrong fundamentals and...
$136k - $218.5k
...choice to join us today.The mixed-signal high-speed I/O group delivers innovative PHY designs... ...closely with analog designers and system architects to develop micro-architecture... ...protocols, such as Ethernet, InfiniBand, PCIe, and USB.Understanding of on-chip microcontrollers...Full time- ...Description As the Senior Principal Platform Architect for UALink Switch... ...switch chassis, defining high-speed backplane topologies, cabled... ..., routes around failed links, handles hot-swapping of... ...UALink, NVLink, OAM/UBB, PCIe Gen6/Gen7, CXL, or Ultra Ethernet)....PrincipalFull timeWorldwide
$150k - $210k
...Silicon Validation Manager - High-Speed SerDes / PCIeLocation: Santa... ...Validation, High-Speed SerDes, PCIe and/or Ethernet, UALink,... ...Collaborate closely with SoC/PHY architects, digital and analog designers... ...applicable) and PHY layers, including link training, LTSSM, error...- ...Description An AI Interconnect Architect defines and engineers high-speed networking and communication... ...interconnect technologies such as PCIe, CXL, co-packaged optics, UALink, Ultra... ...technologies including transport and link level protocols, switching fabrics,...PrincipalTemporary workRemote workFlexible hoursShift work
$220.92k - $311.89k
...Description: The Role and ImpactAs a Principal Engineer in Analog Circuit... ...of next-generation high-speed IO PHYs with industry-leading... ...fundamentals, including TX/RX blocks, I/O PHY architecture , low-power design... ...- Familiarity with UCIe and PCIe specifications- Strong...PrincipalFull timeLocal areaImmediate startShift work$272k - $431.25k
NVIDIA is seeking a Principal SoC Architect to join our architecture team and drive... ...Specification & Modeling: Author high-quality architecture... ...definitionRobotics & Automotive I/O: Practical knowledge of high-speed interfaces (PCIe, GMSL/Camera interfaces, Time-...PrincipalFull time- ...Position : Principal / Lead Engineer PCIe Gen5/Gen6 Controller, PHY & SerDes... ...We are seeking a highly experienced Principal... ...PCIe protocol, high-speed interfaces, subsystem... ...enhancements. Support PCIe/CXL interoperability and... ...Work on: Link training...PrincipalFull time
- Qualcomm is seeking a highly experienced Server IO specialist to architect and design end‑to‑end Server IO solutions, including PCIe, CXL, and emerging technologies for datacenter SoCs. The role involves collaboration with chip architects, IP design, performance and verification...
$189k - $301k
A leading semiconductor company in San Jose is seeking a Senior Staff Engineer specializing in High-Speed I/O Analog-Mixed Circuit design. The role requires extensive experience in analog circuit design and high-speed interfaces, with a focus on optimization and simulation...- ...career. THE ROLE: You will contribute to the ASIC (chip) design for high-performance network chips: AINIC and DPU. As a member of the... ...and implementationFront-end RTL design and integration of high-speed I/O subsystemsCollaboration with architecture, IP, and physical...
- ...Piper Companies is seeking a Principal Hardware Architect in the San Jose, CA area to lead architecture and design of high-speed, high-power networking boards and support ASIC bring-up. This onsite role calls for a senior electrical engineering leader who can guide complex...
- ...Design Technologies provides high-performance, ultra-low... ...generation of ultra high-speed SerDes IP at 448G and beyond... ...Description We are seeking a Principal / Lead DSP & Systems Architect to own the architectural... ...will drive end-to-end link architecture, DSP algorithm...Principal
$168k - $264.5k
...Design Engineer for our Coherent High Speed Interconnect team!For two... ...SoCs and GPUs.Collaborate with architects, external partners, software... ...interconnect protocols like PCIE, CXL, AXI, CHI will be useful.Understanding or experience with Link layer stacks including Data link...Full time$124k - $195.5k
...where everyone is inspired to do their best work.We're looking for a curious and driven Junior Interconnect Engineer to join our High-Speed Interconnect team onsite in Santa Clara, CA. This is a great opportunity to develop deep expertise in high-speed cable and connector...Full timeInternship- Qualcomm Technologies, Inc. is hiring a highly experienced Server IO specialist to architect and design end-to-end IO solutions, including PCIe and CXL technologies for datacenter SoCs. You will work with chip architects, IP design teams, and software stakeholders to optimize...
- ...Qualcomm Technologies, Inc. seeks an experienced PCIe Subsystem Architect to define and deliver high-performance I/O architectures for next-generation AI products in... ...candidate will have deep expertise across PCIe, CXL, UCIe, NVMe, Ethernet and related datacenter connectivity...
$200k - $300k
Job Title: Principal ASIC Architect - Memory Systems & AI InterconnectsJob Location: Santa Clara,... ...ASIC Architecture, Memory Subsystems, CXL / NVLink / PCIe / UCIe/ UALink / RDMA, ARM CHI, AI... ...AI infrastructure, with a focus on high-bandwidth optical interconnects for...Principal$272k - $431.25k
...We are seeking a senior CPU architect with deep experience designing high-performance, high-frequency server-class processors. This role focuses on the interaction between CPU architecture, power-performance optimization, and physical design. The successful candidate...Principal- ...Verification Lead / Principal Verification Engineer PCIe Gen5/Gen6 Location... ...We are seeking a highly experienced Verification... ..., Transaction/Data Link/Physical Layers, LTSSM... ...Scoreboards. Architect reusable UVM verification... ...behavior Speed changes Lane width...PrincipalFull time
$148.32k - $203.94k
...00 applications, including high-growth ones in AI datacenters... ..., visit: .Job Summary The Principal Hardware Signal Integrity/Power Integrity Architect is accountable for system-... ...design Experience in high-speed interface design, e.g., DDR, PCIe, USB, and similar protocols...Principal$272k - $431.25k
...-generation orbital roadmap to speed up AI adoption. We are looking for a strong technical architect to own end-to-end system software... ...interfaces (USB, SMBus/I2C, PCIe) and proficiency with modern management... ...skills, good work ethics, high sense of team-work, love to...PrincipalFull timeWork experience placementRemote work- A leading Silicon Valley hardware startup is seeking a highly experienced Senior Staff Engineer to lead the architecture, development, and integration of OCP SAI with SONiC. The ideal candidate will have extensive experience in dataplane programming and control plane integration...Principal
$184k - $287.5k
We are looking for a Senior GPU PCIe and Boot architect. NVIDIA is seeking outstanding engineers to design... ...and infrastructure for boot, PCIe/CXL enumeration, and capability discovery.... ...be an equal opportunity employer. As we highly value diversity in our current and future...Full time- ...Intel Corporation seeks a Principal SerDes Architect to lead analog/mixed-signal IP design in Santa Clara. You will drive architecture, define high-speed IO PHYs, and mentor technical leaders across Intel. Expect collaboration with multiple teams to optimize performance...
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