Firmware Engineer

Firmware Engineer Location: Irvine, CA (Potential consideration for the Washington, DC area) Employment Type: Full-Time Work Arrangement: Onsite Salary Range: $145,000 – $175,000 USD About The Role An innovative space technology company is seeking an experienced Firmware Engineer to join its Space Systems Engineering team. In this role, you will be responsible for designing, developing, and verifying FPGA firmware for advanced radar and Synthetic Aperture Radar (SAR) payload electronics supporting next‑generation Earth observation satellites. Working closely with RF, Systems, Embedded Software, and Assembly, Integration & Test (AI&T) teams, you will play a key role in developing flight‑quality firmware for high‑performance space hardware. This is an excellent opportunity for an engineer who enjoys solving complex digital design challenges while contributing to cutting‑edge aerospace technology. Key Responsibilities Design, implement, and verify FPGA firmware supporting radar signal generation, digital beamforming, and SAR data processing pipelines. Develop and maintain RTL designs using VHDL and/or Verilog targeting Xilinx RFSoC and UltraScale+ FPGA platforms. Architect modular and reusable FPGA frameworks that support multiple product configurations while reducing future development effort. Integrate FPGA firmware with embedded software running on Linux and bare‑metal ARM‑based System‑on‑Chip (SoC) platforms. Define and implement high‑speed digital interfaces between FPGA fabric and RF/analog front‑end hardware. Perform timing closure, resource optimization, and power analysis for flight‑grade FPGA designs. Develop and execute FPGA verification strategies including simulation, hardware‑in‑the‑loop (HIL) testing, flat‑sat integration, and EGSE test environments. Collaborate with RF and Systems Engineering teams to translate radar waveform and digital signal processing requirements into FPGA implementations. Support Assembly, Integration & Test (AI&T) activities by providing firmware builds, diagnostic capabilities, and debugging support throughout payload integration and qualification. Create and maintain configuration‑controlled firmware baselines, release documentation, and design artifacts supporting engineering review milestones including PDR, CDR, and TRR. Participate in design reviews, architecture trade studies, and technical risk assessments related to FPGA and digital subsystem development. Required Qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical discipline (Master's degree preferred). 5–8 years of professional experience designing FPGA firmware using VHDL and/or Verilog. 3+ years of experience with Xilinx (AMD) FPGA development tools including Vivado, Vitis, and Vivado HLS. 3–5 years of experience implementing digital signal processing algorithms in FPGA hardware, including filtering, FFTs, digital down‑conversion, and waveform generation. 3–5 years of hands‑on experience developing firmware for System‑on‑Chip (SoC) architectures, including PS‑PL integration on Zynq or Zynq UltraScale+ platforms. Working knowledge of high‑speed serial interfaces and industry‑standard communication bus protocols. Strong analytical and debugging skills with the ability to optimize firmware performance, timing, and resource utilization. Excellent communication skills and the ability to collaborate effectively within multidisciplinary engineering teams. Preferred Qualifications Experience developing firmware for Xilinx RFSoC devices such as ZU27DR, ZU47DR, or similar platforms with direct RF ADC/DAC integration. Background in radar or Synthetic Aperture Radar (SAR) signal processing, including pulse compression, range/Doppler processing, or beamforming algorithms. Familiarity with radar waveform design and RF system concepts such as dynamic range, noise figure, and spurious performance. Experience developing aerospace, defense, or space‑qualified electronic hardware. Exposure to formal FPGA verification methodologies including UVM, constrained‑random testing, and code coverage analysis. Experience developing embedded Linux and bare‑metal firmware for ARM Cortex‑A/R processors. Familiarity with version control systems and FPGA configuration management using Git and CI/CD workflows. Knowledge of environmental qualification, radiation effects, thermal derating, FMEA, and reliability considerations for FPGA‑based designs. Experience supporting hardware integration and laboratory testing using oscilloscopes, logic analyzers, spectrum analyzers, and other electronic test equipment. Why Join? Develop flight‑quality FPGA firmware for next‑generation radar satellite payloads. Work alongside highly skilled RF, Systems, Embedded Software, and AI&T engineers on cutting‑edge space technology. Contribute directly to advanced Earth observation missions supporting commercial and government customers. Competitive compensation, comprehensive healthcare benefits, flexible PTO, and additional employee perks. Opportunity to influence the architecture and performance of next‑generation spaceborne radar systems in a collaborative engineering environment. #J-18808-Ljbffr EVONA