Staff SoC Design Engineer
$251k - $310kWaymo
Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver—The World's Most Experienced Driver™—to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo’s fully autonomous ride-hail service and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over ten million rider-only trips, enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15+ U.S. states. Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle’s software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world’s highest performance automotive compute platforms. In this hybrid role, you will report to an Engineering Director. You will: Define the architecture and microarchitecture for Waymo's next-generation autonomous vehicle SoCs, translating system-level requirements into detailed hardware specifications and RTL implementation, using your knowledge of how hardware, firmware, drivers, and compilers interact Lead microarchitecture and implementation of IPs and subsystems, including for high-performance cache/memory hierarchies, Network-on-Chip (NoC) interconnects, and custom accelerators Work with Architects, Firmware and Software teams to drive feature closure and develop microarchitecture specifications Perform power, area and performance exploration and optimization of digital designs Mentor other engineers and guide the technical side of relationships with external vendors, using innovative ideas to solve their design challenges, evaluate and select third-party IP, and ensure a timely and successful tapeout and product You have: MS degree in Computer Engineering, Electrical Engineering, or a related field, or equivalent practical experience 10+ years of industry experience in ASIC/SoC digital design, microarchitecture, and integration, including ownership of major design blocks or subsystems Proven track record of technical leadership driving design and execution from concept to production, and hands-on experience with multiple successful ASIC tapeouts Deep expertise in SystemVerilog for RTL design, microarchitecture, and integration Strong understanding of computer architecture, memory systems, cache coherence, and high-speed on-chip interconnects Fluency in programming/scripting languages (e.g., Python, C++) for architectural modeling, design automation, and debug Strong debug and problem-solving skills, with the ability to root-cause complex issues across hardware and software boundaries We prefer: PhD degree in Computer Engineering, Electrical Engineering, or a related field Experience in hardware/software co-design, including in mixed hardware/software datapaths, such as in the context of DSPs, GPUs, and ML accelerators Knowledge of arithmetic units, processor design, accelerators, bus architectures, fabrics/NoC or memory hierarchies. Knowledge of high performance and low power design techniques Fluency and comfort with AI tools to accelerate and improve design and debug Experience with Chisel (Scala) or other hardware DSLs for RTL generation The expected base salary range for this full-time position across US locations is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level. Your recruiter can share more about the specific salary range for the role location or, if the role can be performed remote, the specific salary range for your preferred location, during the hiring process. Waymo employees are also eligible to participate in Waymo’s discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements. Salary Range
$251,000 — $310,000 USD
$175k - $280k
...actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING)At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink,...SuggestedPermanent employmentTemporary workWorldwideWeekend work$120k - $200k
ASIC/SOC Silicon Physical Design Engineer Mountain View, CA MatX's mission is to make the world’s best AI models run as efficiently as allowed by physics, bringing the world years ahead in AI quality and availability. MatX is seeking silicon physical design engineers...SuggestedFull timeWork experience placementLocal area$200k - $300k
Job Title: Lead SoC Design Engineer - Edge AI, High-Performance ASICJob Location: Los Altos, CA - hybridCompensation: $200K - $300K base DOE plus equityRequirements: SoC Microarchitecture, RTL Design, IP Integration (UCIe, DDR, CPU/GPU/NPU), ARM Cores, Memory Subsystems...Suggested$138k - $197k
...document the microarchitecture for digital designs within the TPU.Develop high-quality,... ...qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science,... ...and generation of RTL.Experience with SOC implementation standards and interfaces (...SuggestedWorldwide$164.47k - $311.89k
Job Details:Job Description: As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance, power efficiency, and functionality of Intel's cutting-edge System-on-Chip (SoC) designs. Your expertise will directly impact product quality, enabling...SuggestedFull timeInternshipLocal areaImmediate startShift work$141.91k - $200.34k
...:Job Description: About the RoleJoin the Design Technology Platform (DTP) organization within Intel Foundry as part of the X-Chip SoC Full-Chip Integration team. This team plays... ...Experience:Master's degree in electrical engineering or related field with minimum of 5 years...Full timeWork experience placementLocal areaImmediate startShift work$136k - $218.5k
NVIDIA is looking for a Senior SOC Design Engineer to join our SOC Design team! At NVIDIA, you'll collaborate with brilliant minds to build cutting-edge GPUs and SOCs that power everything from AI to gaming! As a Senior SOC Design Engineer, you'll work at the forefront...Full time$183k - $247.6k
Annapurna Labs designs silicon and software that accelerates innovation... ...change the world.Custom SoCs (System on Chip) live at the heart... ...for an ASIC Physical Design Engineer to help us trail-blaze new technologies... ...employees, supervisors, and staff; adhere to standards of...Local areaFlexible hours$110.6k - $140k
DescriptionResponsibilities :Image sensor control or processing function design and verificationHigh speed interface (USB/MIPI) design and... ....Knowledge of FPGA and emulation platforms.Knowledge of SOC architecture.Knowledge of assertion-based formal verification is...- ...candidate will be involved in the microarchitectural design and RTL implementation of Adaptive SoC and FPGA configuration system. THE PERSON:You are passionate... ...functional coverage.Work closely with test engineers to implement design-for-test (DFT) and special FPGA test...
$141.91k - $200.34k
Job Details:Job Description: The Role and ImpactAs a SoC Logic Design Engineer, you will play a pivotal role in advancing Intel's next-generation System on Chip (SoC) designs. In this role, you will focus on developing high-quality logic designs, coding at the register...Full timeLocal areaImmediate startWorldwideShift workNight shift$200k - $250k
Job Title: Principal RTL Design Engineer - PCIe / CXL / High-Speed SoCLocation: Santa Clara, CACompensation: $200K - $250K... ...SystemVerilog, PCIe / CXL / Ethernet / UALink, High-Speed SoC DesignPosition OverviewAs a Sr. Staff or Principal RTL Design Engineer, you will join the...$164.47k - $269.1k
Job Details:Job Description: About the RoleAs a Senior SoC Design Verification Engineer, you will lead verification efforts for complex system-on-chip (SoC) designs that enable Intel's next generation of client computing and AI technologies. You will drive verification...Full timeLocal areaImmediate startWorldwideShift work$105.65k - $172.86k
...Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology... ....Come join us -In this role you will be part for the Server SoC Design Validation team, working on next-generation Xeon server...Full timeInternshipLocal areaImmediate startShift work- ...performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI... ...adaptive, self-motivated design verification engineer to join our growing team. As a key contributor, you will be part of a SOC team to drive and improve AMD's abilities to...
$120k - $250k
...quality and availability. MatX is seeking silicon verification engineers to join our team as we create best-in-class silicon for high-performance... ...closure towards various silicon milestones including design freeze and tapeoutWho You AreConcept-to-silicon experience in driving...Full timeWork experience placementLocal areaRemote workMonday to FridayFlexible hours$150.4k - $277.6k
...SoC Physical Design Engineer, STA/Timing Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could...Relocation$150.98k - $218.62k
...more at and on LinkedIn and X.The OpportunityADI is seeking a talented and experienced Staff Design Verification Engineer to help develop next-generation eFPGA technology and the SoCs that integrate it. This role is ideal for engineers with strong digital design...Permanent employmentFull timeWork at officeDay shift$200k - $250k
Job Title: Principal Design Verification Engineer - PCIe / High-Speed SoCLocation: Santa Clara, CACompensation: $200K - $250K base DOE plus bonus and... ...total comp.)Requirements: Design Verification, High-Speed SoC, PCIe / UALink / SerDes, SystemVerilog, UVMPosition...$192k - $278k
Collaborate with product design teams on thermal integration and optimization of SoCs in the system.Lead Camera features execution, development and roadmap within... ...qualifications:Bachelor's degree in Mechanical Engineering, Electrical Engineering, a relevant technical...WorldwideShift work$220.92k - $311.89k
Job Details:Job Description: The Role and ImpactWe are seeking a highly experienced a Director, SoC Design Engineering, to lead the functional verification efforts for cutting-edge system-on-chip (SoC) designs. In this strategic role, you will define and implement scalable...Full timeWork experience placementLocal areaImmediate startWorldwideShift workNight shift- Intel is looking for an experienced SoC Logic Design Engineer based in Santa Clara, California. You will develop high-quality logic designs for innovative System-on-Chip solutions, collaborating with architects and integrating Intellectual Property blocks into SoC designs...
$220.92k - $311.89k
Job Details:Job Description: Intel’s AI SoC organization develops cutting-edge products... ...data center accelerators. If you are an engineer with strong technical and communication skills... ...hardware.Role OverviewAs a Lead Senior Design Engineer - AI SoC Development , you will...Full timeLocal areaImmediate startShift work$120k - $275k
...workloads for AGI. MatX is seeking silicon micro-architects and design engineers to join our team as we create best-in-class silicon for high-... ...maintain power estimation methodologies for AI accelerator SoCs.Build and calibrate energy models for early architectural exploration...Full timeWork experience placementLocal areaRemote workMonday to FridayFlexible hours$161.55k - $317.6k
...FoundryOrganization Overview: Manufacturing Development Customer Engineering (MDCE) is Intel's newest organization within Intel Foundry... ...customers.Position Summary: We seek an experienced Senior Staff Collateral Design and DFM Engineer to join our MDCE team and help build a...Full timeInternshipLocal areaImmediate startShift work$163k - $237k
...developing CPU cache subsystems, focusing on RTL design and microarchitecture for future CPU... ...:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science,... ...Architecture or CPU subsystems.Experience with SoC design, architecture, and integration.Be...Worldwide$119.8k - $234.7k
...Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s... ...augmented reality. We are looking for a Sr. Design Engineer - IP Office to work in the... ...selection, qualification, and adoption for AI SoC programs, ensuring alignment with product...Ongoing contractPermanent employmentWork at officeLocal area3 days per week$163k - $236k
...RTL development, ensuring high-performance designs that strictly adhere to Power,... ...qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science,... ...Engineer, you will architect and implement SoC-level RTL for our next-generation data center...Worldwide$163k - $236k
...review management and control subsystem's design microarchitecture specifications.Develop... ...qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science,... ...role, you will join a team working on SoC-level Register-Transfer Level (RTL)...Worldwide$150k - $270k
...inference.About The RoleAs a member of our tight knit physical design team, you will be working on the design and analysis of 3D integrated... ...products. This role involves a combination of traditional ASIC/SoC physical design skills, packaging, power, clock and cooling...
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