Tech Lead FPGA
Vantage Point Consulting Inc.
JOB DESCRIPTION
- He should have some lead experience, even hands on experience in also fine.
- Design Verification expertise in System Verilog /UVM for Unit/Module level Verification
- Should have Lead Design Verification Team ( Min 5 Members)
- Strong background in developing UVM Testbenches from scratch
- Experience in VIP Integration and Bring up
- Porting Existing Verilog/VHDL environment to UVM based Environment
- Experience in test planning ,Coverage Coding and Debugging
- Deep Knowledge of AMBA Protocol is must
Vacancy posted 1 day ago
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