Silicon Validation Engineer

Job Overview Silicon Validation Engineer – Hybrid role at Hewlett Packard Enterprise (HPE). You will work on average 2 days per week from an HPE office, with remote work options for U.S. candidates. Job Description Responsible for developing and executing chip‑level validation tests for HPE Slingshot NIC and switch ASICs, primarily using emulator‑based and system‑level testing. Works closely with senior validation engineers, architecture, design, and software teams to validate ASIC functionality, identify defects, and improve test coverage across multiple product generations. Responsibilities Develop, execute, and maintain chip‑level validation tests for HPE Slingshot NIC and switch ASICs. Create object‑oriented Python test infrastructure and system‑integration test cases. Validate HPE Slingshot‑specific functionality and industry‑standard networking protocols. Debug functional, performance, and reliability issues uncovered during silicon validation, collaborating with design, architecture, firmware, and software teams. Identify coverage gaps and propose additional test scenarios. Support bring‑up activities for new ASIC revisions and platforms. Document validation results, defects, and lessons learned. Participate in design reviews, validation reviews, and post‑silicon issue triage. Education and Experience Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience. Typically 4–8 years of experience in VLSI validation, verification, or related silicon engineering roles. Required Knowledge and Skills Proficiency with Python programming and object‑oriented programming. Experience writing tests for integrated circuits. Proficiency with Linux command‑line environments. Working knowledge of Verilog or other hardware description languages. Experience with ASIC silicon validation or post‑silicon testing. Working knowledge of high‑speed networking concepts and protocols (Ethernet, SERDES fundamentals). Ability to independently execute validation tasks and debug complex technical issues. Strong written and verbal communication skills in English. Preferred Knowledge and Skills Experience with emulator‑based validation or FPGA‑based platforms. Familiarity with high‑performance NIC or switch ASICs. Exposure to HPC or AI system architectures. Experience with scripting (Bash) and test automation. Familiarity with industry‑standard lossless Ethernet or RDMA‑based technologies. Additional Skills Accountability, Action Planning, Active Learning, Active Listening, Agile Methodology, Agile Scrum Development, Analytical Thinking, Bias, Coaching, Creativity, Critical Thinking, Cross‑Functional Teamwork, Data Analysis Management, Design, Empathy, Follow‑Through, Group Problem Solving, Growth Mindset, Intellectual Curiosity, Long Term Planning, Managing Ambiguity. Benefits Hybrid work model with average 2 days per week on site. Comprehensive benefits covering health, financial, and emotional wellbeing. Programs supporting career development and continuous learning. Inclusive work environment celebrating individual uniqueness. Compensation Annual base salary USD 111,000 – 211,000 in Colorado; USD 105,500 – 243,000 in Minnesota, Texas, and Wisconsin. Additional variable incentives may be offered. EEO Statement Hewlett Packard Enterprise is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories. #J-18808-Ljbffr