Semiconductor Packaging Engineer

Semiconductor Packaging Engineer Sigma Design is a product development, engineering, and manufacturing firm. Based out of the Pacific Northwest, we offer innovative concept through production services to diverse clients around the globe. Sigma Design believes in hiring, developing, and recognizing the best. We offer competitive compensation, a 401(k) with up to 4% company match, quarterly bonus program, 15‑days of accrued PTO and 9 company paid holidays. In addition, Sigma Design has multiple options for medical insurance and dental insurance. We also offer voluntary benefits: vision, long‑term disability, and life insurance. Primary Function: The Semiconductor Packaging Engineer is responsible for developing, executing, and optimizing semiconductor and advanced packaging assembly and integration processes. This role supports the design, fabrication, and validation of advanced electronic packaging solutions for heterogeneous, flexible, and stretchable electronic systems, while collaborating across research, hardware, and manufacturing teams to improve device performance, reliability, and scalability. Essential Job Functions - Responsibilities: Lead assembly and integration engineering efforts with emphasis on Surface Mount Technology (SMT), Die Bond/Wire Bond processes, and support activities related to molding, laser fabrication, panel or wafer lamination, and component thinning, planarization, and dicing. Develop and implement advanced packaging solutions to enable heterogeneous, flexible, and stretchable integration of electronic components and devices. Design and oversee internal, external, and hybrid manufacturing workflows to accelerate development, integration, and scale‑up of advanced electronic packaging technologies. Develop new methods and processes to close technology gaps, improve device performance, and increase manufacturing yield through process innovation and optimization. Design and execute experiments (DOE), analyze experimental results, and apply findings to improve packaging processes, device performance, and yield. Execute hands‑on fabrication workflows using advanced packaging and assembly equipment, identify in‑line process issues, and propose solutions or workarounds to improve manufacturing performance. Collaborate closely with researchers, hardware engineers, system integration teams, and external manufacturing partners to support the development and production of advanced electronic packaging solutions. Support the development and use of high‑performance electronic materials in advanced packaging environments. Contribute to instrumentation development, process characterization, mechanical or layout design, and data analysis methods used in hardware research and development environments. Follow Business Technology policies to protect sensitive data and reduce information security occurrences. Education and Experience: (Knowledge, Skills, & Abilities) Bachelor’s degree in Mechanical Engineering, Electrical Engineering, Aerospace Engineering, Chemical Engineering, Applied Physics, Materials Science, or related technical field or equivalent professional experience required. Minimum of 1+ years of relevant work experience in semiconductor manufacturing, advanced packaging, or related electronics manufacturing environments preferred. Strong background in semiconductor or advanced packaging processes, including wafer‑level or panel‑level manufacturing. Hands‑on experience working with semiconductor assembly and packaging equipment. Experience designing and executing Design of Experiments (DOE), analyzing results, and optimizing manufacturing yield. Experience collaborating across research and development, hardware engineering, and manufacturing teams. Strong analytical, troubleshooting, and problem‑solving skills with an innovation and scalability mindset. Experience with advanced packaging technologies such as Flexible Printed Circuits (FPC), Printed Circuit Board Assembly (PCBA), 2.5D/3D integration, or related electronic packaging technologies. Experience working with back‑end‑of‑line (BEOL) and advanced packaging processes including technologies such as thinning, grinding, dicing, soldering, eutectic bonding, electrochemical deposition or metal finishing, through‑silicon vias (TSV), flip‑chip bonding, wire or die bonding, bumping, thermocompression bonding, copper pillar bonding, hybrid bonding, underfill processes, and overmolding or encapsulation. Experience handling and integrating thinned electronic components as part of advanced packaging workflows. Demonstrated success developing or maturing hardware research processes including instrumentation, characterization, mechanical or layout design, and/or advanced data analysis techniques. Experience developing or applying high‑performance electronic materials in semiconductor or advanced packaging environments. Experience with advanced packaging domains including Flexible Printed Circuits (FPC), Multi‑Chip Modules (MCM), System‑in‑Package (SiP), 2.5D/3D integration, Flexible Hybrid Electronics (FHE), or similar technologies preferred. Experience performing reliability testing and failure analysis including die or ball shear testing, wire pull testing, X‑ray inspection, C‑SAM inspection, thermal cycling, and environmental testing preferred. Experience with wearable technologies or technical soft goods preferred. Experience with hermetic or MEMS packaging, thermal management materials, or injection/transfer molding processes preferred. Experience using Finite Element Analysis (FEA) modeling or simulation tools to accelerate design and prevent failures preferred. Experience in System‑in‑Package (SiP) or Multi‑Chip Module (MCM) design, manufacturing, and validation preferred. Experience with signal integrity or power integrity simulation tools (e.g., HFSS) and validation preferred. Strong written and verbal English language communication skills. Excellent teamwork/interpersonal skills and the ability to communicate effectively. Demonstrated ability to work collaboratively, both within and outside one's own work group. Demonstrate commitment and adherence to Sigma Design Core Values. Pass a post‑offer background verification. Work Environment Engineering: Standard office environment with normal amounts of office related conditions. Occasionally may be required to work in environmental conditions that emulate typical user environments in order to facilitate design testing and validation. Occasionally may be required to travel as required to other facilities, clients, or suppliers. Sigma Design is an Equal Opportunity Employer #J-18808-Ljbffr Sigma Design