Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

IP Design Verification Engineer

$141.91k - $200.34k

Intel

Job Details:Job Description: The world is transforming - and so is Intel. Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower people's lives.Do you love to solve technical challenges? Do you enjoy working with cross functional teams to deliver solutions for products ? If so, come join us to do something wonderful.As an IP Verification Engineer, you will be working on UCIe Mixed-Signal IP delivering to multiple Server SoCs.A successful candidate will have proven experience demonstrating the following skills and behavioral traits:Analytical and problem-solving skillsVerbal/written communication skillsEffective team player with continuous learning mindsetWillingness to balance multiple tasksWillingness to work in a fast-paced environment and have as much fun and growth as possible in the processThe primary responsibilities for this role will include, but are not limited to:Test bench development, directed/constrained random test generation in UVMClosely working with design team to review specifications and architecture, define verification plan, coverage, and improve methodologyRun RTL and gate level functional verification, debug failures, and analyze coverageSupport mixed-signal verification using Verilog models of analog IPQualifications:Minimum Qualifications:Minimum qualifications are required to be initially considered for this position.The candidate must have a Bachelor's degree in Electrical/Computer Engineering or Computer Science and 5+ years of experience -OR- Master's degree in Electrical/Computer Engineering or Computer Science and 3+ years of experience -OR- PhD in Electrical/Computer Engineering or Computer Science and 2+ years of experienceRelevant Work experience include:IP or SoC verification experience using System Verilog/UVMReading and interpreting technical specs and Register Transfer Level (RTL) code for debugImplementation of verification environments that include use of constrained-random stimulusCode/Functional Coverage analysisWriting System Verilog Assertions (SVA)Preferred Qualifications:Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Mixed-Signal VerificationExperience with UCIe or PCIe or I/OJob Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, California, Santa ClaraAdditional Locations:US, Oregon, HillsboroPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $141,910.00-200,340.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.SummaryLocation: US, California, Santa Clara; US, Oregon, HillsboroType: Full time

Vacancy posted 1 day ago
Similar jobs that could be interesting for youBased on the IP Design Verification Engineer in Santa Clara, CA vacancy
  • $2,000 per month

     ...for frontier intelligence. We co-design chips, racks, software, and manufacturing...  ...investors and staffed by leading engineers, Etched is redefining the...  ...Summary We are seeking a Design Verification Engineer to join our Internal IP DV team. You will ensure the custom... 
    Suggested
    Work at office
    Relocation package
    Night shift

    Etched

    San Jose, CA
    25 days ago
  • $2,000 per month

     ...for frontier intelligence. We co-design chips, racks, software, and manufacturing...  ...investors and staffed by leading engineers, Etched is redefining the...  ...Summary We are seeking a Design Verification Engineer to join our Interface IP DV team. You will work with architects... 
    Suggested
    Work at office
    Relocation package

    Etched

    San Jose, CA
    1 day ago
  • $143.8k - $230k

     ...Candidate Account, please Sign-In before you apply. Job Description: Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the design of complex custom ASICs and embedded IP, is looking for an experienced verification engineer that will... 
    Suggested
    Full time
    Local area
    Worldwide

    Broadcom

    San Jose, CA
    3 days ago
  • $100k

     ...contributors of all seniorities.Tenstorrent is seeking a SoC Physical Design Verification Engineer to drive full-chip signoff and ensure manufacturable, high-...  ...You AreA seasoned engineer with a strong background in CPU/IP/SoC physical verification and tapeout closure.A hands-on... 
    Suggested
    Permanent employment

    Tenstorrent

    Santa Clara, CA
    3 days ago
  • $141.91k - $200.34k

    Job Details:Job Description: Intel is seeking a Design Verification Engineer for the Silicon Chassis team. In this role, you will contribute to verification of next-generation interconnect and chassis IPs that scale across multiple product families. You will work closely... 
    Suggested
    Full time
    Local area
    Immediate start
    Shift work

    Intel

    Santa Clara, CA
    4 days ago
  • $180.2k - $297.2k

     ...building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile...  ...and ResponsibilitiesWe are seeking a highly skilled GPU Design Verification Engineer (GCDV) to join our team at SARC/ACL. As a key member of our... 
    Hourly pay
    Full time
    Relocation

    Samsung Semiconductor

    San Jose, CA
    1 day ago
  •  ...WiproContact: Meghana GorusuCompany: SRI Tech SolutionsJob Title:Design Verification EngineerLcation: Sunnyvale CA /Redmond WA/ Austin TX Onsite (...  ...Responsibilities:NO 18+ yrs profilesNo Contractors-IP level Verification - SOC Design Verification· Strong understanding... 
    Full time
    For contractors
    Remote work

    SRI Tech

    Sunnyvale, CA
    4 days ago
  • $151k - $251.8k

     ...building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices consumed...  ...world. Come build with us!Role and ResponsibilitiesAs a Design Verification Engineer, you will contribute to the verification of System IP,... 
    Hourly pay
    Full time
    Relocation

    Samsung Semiconductor

    San Jose, CA
    4 days ago
  • $138k - $198k

    Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.Create a constrained...  ....Experience verifying compute IPs.Strong problem-solving,... 
    Worldwide

    Google

    Sunnyvale, CA
    4 days ago
  •  ...Azure, and Oracle.THE PERSON:We are seeking a high‑impact Design Verification Engineer with strong technical depth, ownership, and the ability to...  ...issues, and is comfortable leading verification efforts across IP, subsystem, and SoC levels.You will work in a fast‑paced,... 

    AMD

    Santa Clara, CA
    6 days ago
  •  ...computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI...  ...for an adaptive, self-motivated design verification engineer to join our growing team. As a key contributor...  ...to support the next generation IP Maintain or improve current test libraries... 

    AMD

    San Jose, CA
    2 days ago
  •  ...silicon and system.DescriptionWe are looking for an experienced design verification engineer to join our SoC team at Baidu’s Sunnyvale office. The...  ...mixed-signal co-simulation using Verilog models of analog IP. Develop testbench, test cases, reference model, coverage model... 
    Work at office

    Baidu

    Sunnyvale, CA
    2 days ago
  • $138k - $198k

    Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.Create a constrained...  ....Experience verifying compute IPs.Strong problem-solving,... 
    Worldwide

    Google

    Sunnyvale, CA
    4 days ago
  • $119.8k - $258k

     ...We are looking for a Design Verification Engineer to support SoC-level verification of advanced high-speed and security IP. This role involves close collaboration with design and architecture teams to verify complex digital systems. Responsibilities Develop and execute... 
    Full time

    Sintegra

    Sunnyvale, CA
    3 days ago
  • $80 - $90 per hour

     ...Solutions We are looking for an adaptive, self-motivative Design Verification Engineer to join our growing team. As a key contributor, you will be...  ...market. Be a part of a team that delivers Industry leading IP and help our experts in RTL, FW, circuit, and architecture... 
    16 hours
    Contract work

    Infotree Global Solutions

    Santa Clara, CA
    3 days ago
  •  ...of that team there's no telling what you could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality and...  ...model). You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design and architecture... 

    Apple

    Cupertino, CA
    2 days ago
  • $130k - $192k

     ...Semiconductor Recruiting. Functional verification of complex designs. Responsible for verification from test...  ...expertise with Interface IP designs. Beneficial areas would include...  ...Full-time Job function Job function Engineering and Design Industries Semiconductor Manufacturing... 
    Full time
    H1b

    Tara Technical Solutions (TTS)

    San Jose, CA
    5 days ago
  •  ...communication for millions of users worldwide. **Description** As a Design Verification Engineer, you'll be at the center of our silicon design group's...  ...and directed test cases that thoroughly validate complex IP and subsystem designs, working closely with multi-... 
    Worldwide
    Night shift

    Apple

    Sunnyvale, CA
    1 day ago
  • $97.7k - $182.62k

     ...message the job poster from Capgemini Engineering About the Job You're Considering Join a...  ...collaborative and forward-thinking team as a Design Verification Engineer, contributing to the...  ...environments using SystemVerilog and UVM for IP and SoC designs. Develop test plans and... 
    16 hours
    Full time
    Local area

    Capgemini Engineering

    Santa Clara, CA
    2 days ago
  •  ...Join to apply for the Design Verification Engineer role at Quest Global Quest Global delivers world‑class end‑to‑end engineering solutions by leveraging...  ...board development. What You Will Bring Experience in block/IP/sub‑system level verification of SoC IPs and peripherals,... 
    Full time

    QuEST Global

    San Jose, CA
    5 days ago
  •  ...Design Verification Engineer Rootshell Enterprise Technologies Inc. is a recognized provider of professional IT Consulting services in the US....  ...Networking product design Design for low-cost OT, Ruggedized, IP-rated product design Embedded CPU design, especially x86... 

    Rootshell Inc

    Santa Clara, CA
    3 days ago
  •  ...Together, we advance your career. THE ROLE: As a verification engineer in the AECG Group, you will help bring to...  ...customers. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, PD teams, and product engineers to... 

    AMD

    San Jose, CA
    4 days ago
  • $168k - $264.5k

     ...impact on the world.NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation SoC and IP solutions! We are...  ...robust and high-performance connectivity across complex SoC designs. This position demands a motivated individual who understands... 
    Full time
    Night shift

    Nvidia

    Santa Clara, CA
    3 days ago
  • $136k - $218.5k

    We are now looking for a Senior Verification Engineer!NVIDIA has been transforming computer graphics...  ...will be part of a front-end multi-media IP team responsible for a varied set of...  ...the development of NVIDIA multi-media IP designs with emphasis on first pass success.Collaborate... 
    Full time

    Nvidia

    Santa Clara, CA
    4 days ago
  • $164.47k - $311.89k

     ...Details:Job Description: About the RoleIntel is seeking a Senior Design Verification Engineer for the Silicon Chassis team. In this role, you will own end-to-end verification of critical chassis and interconnect IP blocks from planning through signoff. You will drive quality... 
    Full time
    Internship
    Local area
    Immediate start
    Shift work

    Intel

    Santa Clara, CA
    4 days ago
  • $136k - $218.5k

    We're now looking for a Senior Digital Design Verification Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the...  ...the design and implementation of our cutting edge SerDes IPs. This ground breaking technology will enable and accelerate... 
    Full time

    Nvidia

    Santa Clara, CA
    4 days ago
  • $124k - $208.4k

     ...building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile...  ...build with us!Role and ResponsibilitiesAs a Senior GPU Design Verification Engineer - GCDV, you will contribute to the verification of top-level... 
    Hourly pay
    Full time
    Relocation

    Samsung Semiconductor

    San Jose, CA
    3 days ago
  • $136k - $218.5k

    NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This...  ...part of Circuit Solutions Group to develop various innovative IPs for hardware security, clocking, voltage regulation and... 
    Full time
    Work experience placement
    Remote work

    Nvidia

    Santa Clara, CA
    3 days ago
  • $200k - $250k

    Job Title: Principal Design Verification Engineer - PCIe / High-Speed SoCLocation: Santa Clara, CACompensation: $200K - $250K base DOE plus bonus and...  ...planning, architecture, and execution for complex IP (PCIe, SerDes, UALink, interconnect) and full-chip integrations... 

    CyberCoders

    Santa Clara, CA
    3 days ago
  • $158.6k - $317.8k

     ...semiconductor and infrastructure technology, designing advanced chip solutions that power high...  ...industries. With a strong focus on engineering excellence, cutting-edge research, and...  ...We are seeking a  Principal Design Verification Engineer to join a high-performing engineering... 
    Full time
    Worldwide

    Inabia Software & Consulting Inc.

    Santa Clara, CA
    21 hours ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to IP Design Verification Engineer. Be the first to apply!