Junior FPGA Engineer

Location: Chicago The Role A world leading quantitative trading firm is hiring an FPGA Engineer to join its hardware team, building the circuits and IP that power its automated trading infrastructure. You'll take designs from RTL through verification, own reusable IP blocks, and help scale hardware across the firm's global footprint. What You'll Need Hands-on professional background in FPGA/ASIC design and verification Track record building IP that's reusable and portable across platforms, not one-off designs Strong grasp of digital design fundamentals Fluency in at least one HDL - SystemVerilog, Verilog, or VHDL Comfort with standard EDA toolchains Working C++ ability Scripting chops in TCL, Python, or Bash A degree in EE, CS, CE, or an adjacent technical field, or on track to complete one by January 2026 A plus: exposure to high-speed transceivers, networking protocols, or packet processing What the Job Looks Like Write and verify RTL for live trading systems Build IP components designed to be reused across multiple platforms Bridge hardware designs into the wider tech stack Automate workflows and tooling via scripting Work day to day alongside software, research, and systems engineers Medical (PPO and HDHP options) starting day one, with employer paid plans available Dental and vision covered by the employer from day one HSA with company contributions up to the IRS max; FSA also offered PTO, paid holidays, parental leave for eligible full-time staff Employer paid life insurance 401(k) - Traditional, Roth, and After-Tax options, immediate vesting, company match On-site catered meals, stocked kitchen, and meal delivery stipends Monthly tech stipend EAP Optional add-ons: supplemental life & AD&D, pet insurance Pre-Application: You must be eligible to live and work in the US, without requiring sponsorship Please ensure you meet the required experience section prior to applying Allow 1-5 working days for a response to any job enquiry Your application is subject to our privacy policy, found here: #J-18808-Ljbffr