Senior Analog Design Engineer

Senior Analog Design Engineer

Duration: 6-12+ Months Contract Location: Santa Clara, CA - 5D Onsite

Must Have Skills

Skill 1 – Analog circuit design experience in DACs, ADCs, current drivers, linear regulators, and other various supporting circuitry in CMOS processes

Skill 2 – Proficiency in the use of Python to generate test code for silicon verification & characterization

Skill 3 – Good understanding of IC device physics, spice models, ESD, latch-up, and manufacturing technology are also required

Good To Have Skills –

Skill 1 – Proficient in the use of Cadence's IC design environment (Virtuoso Schematic/Layout), analog circuit simulation (Spectre/ADE), and digital RTL design (SystemVerilog)

We are looking for a hands-on senior-level engineer with good analog mixed-signal CMOS design background. In this role, you will assist with the design of mixed-signal integrated circuits for innovative semiconductor fabrication tools. If you have a strong ability to learn, good analysis & problem-solving skills, are enthusiastic about questioning current norms and pushing the boundaries of technology, this is the ideal position for you. Our tight-knit group offers a unique opportunity to grow your design skills while you collaborate in the development of different types of analog mixed-signal circuits such as bandgap voltage reference, low-noise amplifiers, comparators, mixers, data converters, active filters, oscillators, etc. Other specific responsibilities include:

• Negotiate specifications with internal customers and other stakeholders
• Translate IC fabrication process capabilities into real world designs
• Design, simulate, and verify basic analog and digital CMOS circuits
• Review and supervise custom layout of analog circuits at the block & chip level
• Design experiments, test boards, and test programs for silicon characterization
• Assist with evaluation and troubleshooting of bench tests during silicon characterization
• Schedule tasks and goals to complete designs on time that meet all specifications

Education & Skills

M.S. in Electrical Engineering (or equivalent) with at least 5 years of industry experience in design of mixed-signal ASICs.

Must Have Prior Experience

Analog circuit design experience in DACs, ADCs, current drivers, linear regulators, and other various supporting circuitry in CMOS processes. (High voltage experience is a plus). Good understanding of IC device physics, spice models, ESD, latch-up, and manufacturing technology are also required. Proficient in the use of Cadence's IC design environment (Virtuoso Schematic/Layout), analog circuit simulation (Spectre/ADE), and digital RTL design (SystemVerilog).

Nice To Have

Knowledge of mixed mode simulation (Cadence AMS Designer) is a plus. Previous experience with testing and characterization of ASICs is very desirable. Proficiency in the use of Python to generate test code for silicon verification & characterization. Knowledge of lab equipment including digital oscilloscopes, signal generators and Semiconductor Automatic Testers (Advantest/ATE).

Functional Knowledge

Demonstrates depth and breadth of expertise in own specialized discipline or field.

Problem Solving

Leads others to solve complex problems; use sophisticated analytical thought to exercise judgment and identify innovative solutions.

Interpersonal Skills

Communicates difficult concepts and negotiates with others to adopt a different point of view.