Senior FPGA Design Engineer

Company DescriptionAxiadois building the future ofAIpowereddigital infrastructure. We are afastgrowing,wellfundedsilicon, systems, and solutionscompany pioneering a newcategoryofsemiconductor called theTrusted Control/Compute Unit (TCU) that combinesadvanced hardware security,AIdrivenresilience and efficiency, andrealtimeplatform management. Our technology protects the world’s most critical infrastructure—from data centers tonextgenerationcloud and AI platforms—by securing systems at thefoundation levels of hardware, independent of host CPUs and operating systems.Founded in 2019and now over 150 employeesstrong,Axiadohas evolved into a recognized leader in the convergence of AI, security, and silicon innovation. We partner with and are actively engaged in commercial programs with multiple Tier 1 industry leaders,validatingboth our technology and our long-term market trajectory.Axiadohas also won numerousindustry awards for our ground-breaking products and technological innovations, includingbeing namedone ofFast Company’s 2025 Top 10 Most Innovative Companiesin Security,winning the2025 Global InfoSec Award for Outstanding AI Security Solution, and being named a finalist for the Global Semiconductor Alliance’s 2025 “Start-Up to Watch” award.AtAxiado, developing breakthrough technology takes more than great engineering—it takes a team of exceptional people who collaborate boldly, challenge assumptions, and take pride in building what comes next. We value curiosity, execution, respect, and a shared desire to make a meaningful impact on the security and reliability of the digital world.Ifyou’redriven to innovate, energized by hard problems, and excited to help define the future of secure AI infrastructure, we invite you to apply and join us on this journey.Job DescriptionSenior FPGA Design Engineerposition is your opportunity to join one of the industry’s leading companies in platform security management and ransomware detection for cloud datacenters, 5G infrastructure and disaggregated compute ecosystems. You should have prior knowledge about RTL design, FPGA prototyping and computer architecture. As the Senior FPGA Design Engineer for Axiado, you will have the opportunity to work in design, verification, debug and system integration. You will work closely with the Architecture, Verification, ASICDesign and Software teams, and report into the Engineering organization.Key ResponsibilitiesRTL design for FPGA, including RTL porting, IP integration, closing timing and generating bit streamsFPGA simulation setup and testingFPGA system setup, validation and debugWork with SW team to bringup and validate FPGA system productQualificationsProduct experience with FPGAs and related tools such as Vivado and ProtocompilerStrong experience in RTL design, especially design for FPGAsIntegration of IPs and CPUs for FPGAExperience in RTL simulation testingExperience in bringing up and debugging SW on FPGA systemsFamiliarity with PCIe, USB, Ethernet, SPI. The following are pluses: ESPI, SGPIO, LTPISelf-driven, good problem solving and communication skillsBS or MS (preferred) degree in EE/EECS/CS or equivalent.At least 5 years of industrial experienceAdditional InformationAxiado is committed to attracting, developing, and retaining the highest caliber talent in a diverse and multifaceted environment. We are headquartered in the heart of Silicon Valley, with access to the world's leading research, technology and talent.We are building an exceptional team to secure every node on the internet. For us, solving real-world problems takes precedence over purely theoretical problems. As a result, we prefer individuals with persistence, intelligence and high curiosity over pedigree alone. Working hard and smart, continuous learning and mutual support are all part of who we are.Axiado is an Equal Opportunity Employer. Axiado does not discriminate on the basis of race, religion, color, sex, gender identity, sexual orientation, age, non-disqualifying physical or mental disability, national origin, veteran status or any other basis covered by appropriate law. All employment is decided on the basis of qualifications, merit, and business need.SummaryType: Full-timeFunction: Product ManagementExperience level: Mid-Senior LevelIndustry: Semiconductors