Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

Senior FPGA Design Engineer

Axiado

Company Description

Axiado is building the future of AIpowered digital infrastructure. We are a fastgrowing, wellfunded silicon, systems, and solutions company pioneering a new category of semiconductor called the Trusted Control/Compute Unit (TCU) that combines advanced hardware security, AIdriven resilience and efficiency, and realtime platform management. Our technology protects the world's most critical infrastructure-from data centers to nextgeneration cloud and AI platforms-by securing systems at the foundation levels of hardware, independent of host CPUs and operating systems.


Founded in 2019 and now over 150 employees strong, Axiado has evolved into a recognized leader in the convergence of AI, security, and silicon innovation. We partner with and are actively engaged in commercial programs with multiple Tier 1 industry leaders, validating both our technology and our long-term market trajectory. Axiado has also won numerous industry awards for our ground-breaking products and technological innovations, including being named one of Fast Company's 2025 Top 10 Most Innovative Companies in Security, winning the 2025 Global InfoSec Award for Outstanding AI Security Solution, and being named a finalist for the Global Semiconductor Alliance's 2025 "Start-Up to Watch" award.


At Axiado, developing breakthrough technology takes more than great engineering-it takes a team of exceptional people who collaborate boldly, challenge assumptions, and take pride in building what comes next. We value curiosity, execution, respect, and a shared desire to make a meaningful impact on the security and reliability of the digital world.


If you're driven to innovate, energized by hard problems, and excited to help define the future of secure AI infrastructure, we invite you to apply and join us on this journey.


Job Description

Senior FPGA Design Engineer position is your opportunity to join one of the industry's leading companies in platform security management and ransomware detection for cloud datacenters, 5G infrastructure and disaggregated compute ecosystems. You should have prior knowledge about RTL design, FPGA prototyping and computer architecture. As the Senior FPGA Design Engineer for Axiado, you will have the opportunity to work in design, verification, debug and system integration. You will work closely with the Architecture, Verification, ASIC Design and Software teams, and report into the Engineering organization.


Key Responsibilities
  • RTL design for FPGA, including RTL porting, IP integration, closing timing and generating bit streams
  • FPGA simulation setup and testing
  • FPGA system setup, validation and debug
  • Work with SW team to bringup and validate FPGA system product
Qualifications
  • Product experience with FPGAs and related tools such as Vivado and Protocompiler
  • Strong experience in RTL design, especially design for FPGAs
  • Integration of IPs and CPUs for FPGA
  • Experience in RTL simulation testing
  • Experience in bringing up and debugging SW on FPGA systems
  • Familiarity with PCIe, USB, Ethernet, SPI. The following are pluses: ESPI, SGPIO, LTPI
  • Self-driven, good problem solving and communication skills
  • BS or MS (preferred) degree in EE/EECS/CS or equivalent.
  • At least 5 years of industrial experience

Additional Information

Axiado is committed to attracting, developing, and retaining the highest caliber talent in a diverse and multifaceted environment. We are headquartered in the heart of Silicon Valley, with access to the world's leading research, technology and talent.

We are building an exceptional team to secure every node on the internet. For us, solving real-world problems takes precedence over purely theoretical problems. As a result, we prefer individuals with persistence, intelligence and high curiosity over pedigree alone. Working hard and smart, continuous learning and mutual support are all part of who we are.

Axiado is an Equal Opportunity Employer. Axiado does not discriminate on the basis of race, religion, color, sex, gender identity, sexual orientation, age, non-disqualifying physical or mental disability, national origin, veteran status or any other basis covered by appropriate law. All employment is decided on the basis of qualifications, merit, and business need.
Vacancy posted 16 hours ago
Similar jobs that could be interesting for youBased on the Senior FPGA Design Engineer in San Jose, CA vacancy
  •  ...Sr FPGA Design Engineer Santa Clara, CA About Anello Photonics ANELLO Photonics is a leading-edge technology company based in Santa...  ...segments. Position Summary ANELLO is seeking an experienced Senior FPGA Design Engineer to lead new product FPGA-based hardware... 
    Senior
    Permanent employment

    ANELLO Photonics

    Santa Clara, CA
    3 days ago
  • $141.3k - $240.2k

     ...Our expert teams of physicists, engineers, data scientists and problem-...  ...towards advanced chip design, KLA's Global Products Group (...  ...application development engineers, and senior product technology process...  ...experienced and motivated Sr. FPGA Engineer to join our electrical... 
    Senior
    Minimum wage
    Work experience placement
    Flexible hours

    KLA

    Milpitas, CA
    1 day ago
  • $100k - $200k

     ...orbit (LEO) space system that will fundamentally change the design, economics, manufacturing and service delivery associated...  ...planet and enhance our overall quality of life. As a Senior FPGA Board Design Engineer, you will participate in the development and test of... 
    Senior
    Full time
    Work at office
    Immediate start
    Visa sponsorship
    Night shift

    E-Space

    Saratoga, CA
    more than 2 months ago
  •  ...We are looking for a Senior Principal Physical Design Engineer to own the top-level floorplan, global power networks, and timing budgets for our next-generation architecture. Requirement Advanced Chip Ownership: Proven track record of owning full-chip top-level integration... 
    Senior

    ACL Digital

    San Jose, CA
    4 days ago
  • $164.8k - $226.6k

     ...Job Summary We are seeking a seasoned FPGA Architect with a minimum of 10 years of experience to lead the design and development of FPGA-based platforms that...  ...involving CMOS design, MEMS design, systems and test engineering, validation, and production teams Define... 
    Suggested

    SiTime Corporation

    Santa Clara, CA
    11 days ago
  •  ...orbit (LEO) space system that will fundamentally change the design, economics, manufacturing and service delivery associated with...  ...enhance our overall quality of life. We are looking for FPGA Design Engineers to develop, implement, and verify FPGA firmware for... 
    Night shift

    E-Space

    Saratoga, CA
    24 days ago
  •  ...next‑generation energy storage architectures, we are building the future of sustainable energy. Role We are seeking a Senior Product Design Engineer to lead the design and development of advanced structural enclosures for high-performance battery systems. This role focuses... 
    Senior

    CertifID LLC

    San Jose, CA
    2 days ago
  • $136k - $218.5k

     ...us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects...  ...of GPU and CPU clocking. The team collaborates with the front design team to understand the clocking requirements for the chip. The... 
    Senior
    Work experience placement

    NVIDIA

    Santa Clara, CA
    6 days ago
  •  ...and write block and chip-level tests in C, SV, UVM. Debug RTL and Gate simulations and work with design engineers to verify fixes. Write diagnostics for validation of FPGA prototype (pre-tapeout) and ASIC. Replicate silicon bugs in simulation environments and validate... 
    Senior

    Mirafra Technologies

    San Jose, CA
    4 days ago
  • $182k - $319k

     ...Province: California  City:  San Jose  General Overview Functional Area: Engineering (ENG) Career Stream: Engineering (ENG) Role: Senior Principal (SPR) Job Title: Senior Principal, Design Engineering Job Code: SPR-ENG-DSGN Summary Thank you for... 
    Senior
    Local area

    Celestica

    San Jose, CA
    3 days ago
  •  ...received industry‑wide recognition, have assembled a world‑class engineering team and just closed a record funding round. They're hiring a...  ...infrastructure and test cases in collaboration with the design team Debug failures, create and track issues to resolution. Develop... 
    Senior

    Platform Recruitment

    San Jose, CA
    4 days ago
  • $134.39k - $201.3k

     ...Digital IC Design Senior Staff Engineer Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities... 
    Senior
    Permanent employment
    Internship
    Work from home

    Marvell

    Santa Clara, CA
    4 days ago
  •  ...Senior Design Verification Engineer Immediate need for a talented Senior Design Verification Engineer. This is a Fulltime opportunity with long-term potential and is located in San Jose, CA (Onsite). Please review the job description below and contact me ASAP if you... 
    Senior
    Full time
    Immediate start

    Pyramid Corporation

    San Jose, CA
    4 hours ago
  • $168k - $336k

     ...As a senior Design Verification engineer, you will employ GenAI and agentic tools to build a design verification environment with an innovative workflow that improves verification efficiency and quality. You will demonstrate clear value in enabling schedule left‑shift... 
    Senior
    Full time
    Local area
    Shift work

    Micron Technology

    San Jose, CA
    1 day ago
  • $142.6k - $206.5k

     ..., which includes participating in high-level product specifications, logic/RTL design and implementation, RTL verification, IP FPGA validation and debugging. Job Details As Lead DV Engineer focusing on IP Verification & Validation, you will be responsible for carrying... 
    Senior
    Local area
    Shift work

    Altera

    San Jose, CA
    4 days ago
  •  ...diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. The Role As a Senior CPU Design Verification Engineer, you will join a CPU testbench infrastructure team responsible for building scalable verification environments for... 
    Senior

    AMD

    Santa Clara, CA
    4 days ago
  • $200k - $300k

     ...Senior ASIC Design Verification Engineer Join Ethernovia's team to make a lasting impact on the future of packet processor-centric networking solutions to support the real-time sensor, Physical AI, and control data demands of software-defined autonomy across vehicles... 
    Senior
    Flexible hours

    Ethernovia

    San Jose, CA
    3 days ago
  • $150k - $220k

     ...orbit (LEO) space system that will fundamentally change the design, economics, manufacturing and service delivery associated...  ...enhance our overall quality of life. We are seeking a Senior ASIC Design Engineer to join our processor subsystem team, focused on the configuration... 
    Senior
    Full time
    Work at office
    Immediate start
    Visa sponsorship
    Night shift

    E-Space

    Saratoga, CA
    18 days ago
  • $130k - $160k

     ...Team Credo is seeking a Design Verification Engineer to ensure the quality and performance of complex digital designs through rigorous verification. You’ll develop and execute verification plans, build scalable reusable testbenches, write SV‑UVM sequences, debug issues... 
    Senior

    Credo

    San Jose, CA
    4 days ago
  • $120k - $220k

     ...orbit (LEO) space system that will fundamentally change the design, economics, manufacturing and service delivery associated...  ...quality of life. We are seeking a highly experienced Senior Physical Design Engineer to join our ASIC implementation team. In this role, you... 
    Senior
    Full time
    Work at office
    Immediate start
    Visa sponsorship
    Night shift

    E-Space

    Saratoga, CA
    20 days ago
  • $208k - $367k

     ...role is for a highly accomplished and forward-thinking Senior Director, Technical Engineer for a leading role in a critical customer engagement. This...  ...with their strategic objectives. Architect and design innovative solutions that leverage emerging technologies... 
    Senior
    Work at office
    Local area

    Celestica

    San Jose, CA
    5 days ago
  • $150k - $200k

     ...(LEO) space system that will fundamentally change the design, economics, manufacturing and service delivery associated...  ...and enhance our overall quality of life. As a Senior Wireless Network Design Engineer , you will lead the design, planning, and optimization... 
    Senior
    Full time
    Work at office
    Immediate start
    Visa sponsorship
    Shift work
    Night shift

    E-Space

    Saratoga, CA
    29 days ago
  • $100 per hour

     ...The selected candidate will be responsible for ASIC & FPGA verification on R&D program. This engineer will be a verification UVM expert. This engineer with have experience : -Verifying FPGA and/or ASIC designs including creating UVM verification environments, testbenches... 
    Remote work

    Precision Resources Company, Inc.

    Sunnyvale, CA
    2 days ago
  •  ...Job Description Job #219105 Chipton-Ross is seeking an FPGA Design/Verification Engineer for a hybrid contract opportunity in Sunnyvale, CA. BASIC QUALIFICATIONS (REQUIRED SKILLS/EXPERIENCE) ~ FPGA verification specialty with UVM experience POSITION... 
    Contract work
    Local area
    Day shift

    Chipton-Ross

    Sunnyvale, CA
    2 days ago
  • $110k - $125k

     ...seeking an experienced, dynamic and dedicated Permanent Structural Engineer to join our team. This is a unique opportunity to bring your...  ...Career Growth Job Details Responsibilities: 1. Design and analyze modular buildings, ensuring they meet all required... 
    Senior
    Permanent employment
    Local area

    Jobot

    San Jose, CA
    16 hours ago
  • $135k - $165k

     ...meet their unique infrastructure requirements. Discover more at Job Description We are seeking an experienced and hands‑on Senior Product Engineer to lead and develop next‑generation high‑speed, high‑performance and low‑power semiconductor products in advanced process... 
    Senior
    Flexible hours

    Astera Labs

    San Jose, CA
    4 days ago
  • $113k - $141.5k

     ...future. AnalogMixed SignalBusiness Unit (AMS) is looking for a Senior Product Engineer to join our team to drive the product development of state-...  ...tests. Collaborate with multi-functional teams such as Design, Test, Applications and Failure Analysis teams during first... 
    Senior
    Full time
    Temporary work
    Local area
    Visa sponsorship
    Work visa
    Flexible hours

    Renesas

    San Jose, CA
    1 day ago
  •  ...Senior Product Security Engineer The Adobe Security Engineering Partnerships (SEP) team is seeking a Senior Product Security Engineer to scale...  ...influencing engineering organizations and key stakeholders, designing scalable security solutions, and independently managing... 
    Senior

    Adobe

    San Jose, CA
    1 day ago
  •  ...Job Description Job Description Responsibilities: As a Senior Logic Design Engineer, you will be responsible for: Developing micro-architecture specification of the logic circuit from reading and comprehending the Product Requirement Document (PRD) Developing... 
    Senior
    Work experience placement

    Ethan Alexander Group

    Santa Clara, CA
    26 days ago
  •  ...change the world. If you have this type of passion, we invite you to apply for this job. Job Description The Senior Emulation Design Engineer position is your opportunity to join one of the industry’s leading companies in platform security management and ransomware... 
    Senior

    Axiado

    San Jose, CA
    23 days ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to Senior FPGA Design Engineer. Be the first to apply!