Senior Hardware RTL & Verification Engineer
$70kDensityAI
DensityAI in Mountain View, California, is looking for engineers to work across various hardware teams. Candidates must have at least 5 years of production silicon experience, strong SystemVerilog and Verilog skills, and familiarity with the end-to-end ASIC flow. This role involves contributions to RTL design, design verification, and physical design among other tasks. The compensation for this position is set at $70,000 USD. #J-18808-Ljbffr DensityAI
Vacancy posted 2 days ago
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