AI Accelerator RTL Design Architect
DensityAI
DensityAI seeks a seasoned RTL design engineer to architect and implement digital blocks for an AI accelerator. You will own the RTL from microarchitecture to synthesis-ready blocks and drive end-to-end silicon bring-up with architecture, DV, PD, and DFT teams. You will optimize for power, performance, and area, collaborate across DV/PD/DFT, and contribute to tool-enabled design flows and high-speed interfaces. #J-18808-Ljbffr DensityAI
Vacancy posted 1 day ago
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