Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

ASIC Timing & Physical Design Engineer

Amazon Locker

Amazon Energy? Annapurna Labs (U.S.) Inc. is seeking a skilled SSTA engineer to design and optimize timing flows for ASICs in Cupertino. You will develop timing constraints, run STA, and collaborate with RTL/Arch teams to deliver high-performance, cost-efficient silicon. The role emphasizes automation, mentoring, and close teamwork within a fast-paced startup-like environment, with a strong focus on delivering reliable, scalable timing solutions. #J-18808-Ljbffr

Vacancy posted 4 days ago
Similar jobs that could be interesting for youBased on the ASIC Timing & Physical Design Engineer in Cupertino, CA vacancy
  • $125.7k - $203.1k

     ...full product development—from design to qualification to...  ...digital world. Your Impact As a Physical Design Engineer, you will play a key role in...  ...optimize floor planning and timing, analyze and improve backend...  ...work experience should be in ASIC Physical Design, ASIC design... 
    Suggested
    Full time
    Temporary work
    Work experience placement
    Internship
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    5 days ago
  •  ...and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer, Netlisting to join our dynamic and growing team. What...  .... Help in all aspects of physical design, such as driving timing convergence, timing constraints generation and management,... 
    Suggested
    Shift work

    NVIDIA Corporation

    Santa Clara, CA
    32 minutes ago
  • $136k - $218.5k

     ...CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect...  ...on implementation, synthesis and timing closure while collaborating closely...  ...preferredas is a deep understanding of ASIC design flow including RTL design... 
    Suggested
    Full time

    NVIDIA

    Santa Clara, CA
    3 days ago
  •  ...N2P Systems is seeking an experienced Physical Design Engineer for its Sunnyvale office to drive RTL synthesis, timing optimization, and floorplanning across ASIC/SoC projects. You will collaborate across RTL, design, and verification teams to enhance implementation quality... 
    Suggested
    Work at office

    N2P Systems Inc.

    Sunnyvale, CA
    3 days ago
  • $163k - $236k

    Participate in the physical design of complex blocks.Contribute to the design...  ...'s degree in Electrical Engineering, Computer Engineering,...  ...floorplanning, place and route, and timing closure).Experience in...  ...AI/ML-driven systems.As an ASIC Physical Design Engineer, you... 
    Suggested
    Worldwide

    Google

    Sunnyvale, CA
    3 days ago
  • $170k - $230k

     ...Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is...  ...floorplanning, power/ground grid generation, place and route, timing, noise, physical verification, electromigration, voltage... 
    Permanent employment
    Temporary work
    Worldwide
    Weekend work

    SPACE EXPLORATION TECHNOLOGIES CORP

    Sunnyvale, CA
    32 minutes ago
  •  ...implementation tradeoffs on timing, power, and area Develop and own gate-level design for CPU blocks:...  ...electromigration analysis, and physical/electrical signoff...  ...s degree in Electrical Engineering, Computer Engineering,...  ...CPU or high-performance ASIC physical design Strong... 
    Full time

    RosaicLabs Inc

    Santa Clara, CA
    1 day ago
  • $176.6k - $247.3k

     ...you’ll be responsible for the design and optimization of Hardware...  ...and full-chip level static timing analysis• Write, debug &...  ...collaboration and teamwork with other physical design engineers as well as with the RTL/Arch...  ...others)- Understanding of ASIC Physical Design from RTL-to-... 
    Full time
    Local area
    Flexible hours

    Amazon

    Cupertino, CA
    4 days ago
  • $160k - $275k

     ...as efficiently as allowed by physics, bringing the world years ahead...  ...is seeking silicon physical design engineers to join our team as we create...  ...(equivalency, extraction, timing, power estimation, EMIR, physical...  ...of industry experience in ASIC Physical Design Great interpersonal... 
    Daily paid
    Full time
    Work experience placement
    Local area
    Remote work
    Monday to Friday
    Flexible hours

    MatX Inc.

    Mountain View, CA
    32 minutes ago
  •  ...Come join the team and see how you can make a lasting impact on the world. We are now looking for a motivated Senior Physical Design and Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part of something great, join us... 
    Full time

    NVIDIA Corporation

    Santa Clara, CA
    3 days ago
  • $107.8k - $157.4k

     ...full product development—from design to qualification to...  ...world. Your Impact As an ASIC Engineer, you will play a critical role...  ...technology work together across the physical and digital worlds. These...  ...Cisco for defined periods of time. U.S. employees are eligible... 
    Full time
    Temporary work
    Work experience placement
    Local area
    Flexible hours

    Cisco

    San Jose, CA
    2 days ago
  •  ...Devices, Inc. (AMD) is seeking a Senior Silicon Design Engineer to research, design, develop, and test electronic components and ASICs for semiconductor manufacturing. The...  ..., front-end RTL, and transitioning to physical design, with a focus on delivering high-performance... 

    Advanced Micro Devices , Inc.

    Santa Clara, CA
    2 days ago
  •  ...Annapurna Labs, part of Amazon, seeks an ASIC Physical Design Engineer in Cupertino to drive floorplanning, placement, integration, and tapeout for advanced SoCs. You will collaborate with the FE team to translate RTL into robust physical designs, and lead DV/verification... 

    Amazon

    Cupertino, CA
    4 days ago
  • $100k

     ...team and looking for contributors of all seniorities.Tenstorrent is looking for a mid- to senior-level Physical Design Engineer with a strong background in static timing analysis (STA). In this role, you will help converge multi-million-gate designs on advanced process... 
    Permanent employment

    Tenstorrent

    Santa Clara, CA
    4 days ago
  • $160k - $275k

     ...as efficiently as allowed by physics, bringing the world years ahead...  ...is seeking silicon physical design engineers to join our team as we create...  ...(equivalency, extraction, timing, power estimation, EMIR, physical...  ...of industry experience in ASIC Physical DesignGreat interpersonal... 
    Daily paid
    Full time
    Work experience placement
    Work at office
    Local area
    Remote work
    Monday to Friday
    Flexible hours

    MatX

    Mountain View, CA
    2 days ago
  •  ...Synopsys is the leader in engineering solutions from silicon to systems...  ...industry-leading silicon design, IP, simulation and analysis...  ...that show up at 16nm when your timing closure strategy collides with...  ...What You'll Be Doing Own physical integration for advanced SerDes... 

    Synopsys

    Sunnyvale, CA
    1 day ago
  • $250.6k - $362.6k

     ...full product development—from design to qualification to production...  ...plan, place and route, static timing analysis, power integrity, physical verification and equivalence checks...  ...Bachelor’s degree in Engineering and 15+ years of ASIC related experience, Master’s degree... 
    Full time
    Temporary work
    Local area
    Flexible hours

    Cisco

    San Jose, CA
    1 day ago
  •  ...Bolt Graphics in Sunnyvale, CA, is seeking a Staff / Senior Staff Physical Design Engineer to drive full-chip physical implementation from netlist to GDSII, targeting timing, power, and area targets for high-performance graphics processors. This on-site role requires... 
    Work at office

    Bolt Graphics

    Sunnyvale, CA
    5 days ago
  •  ...Broadcom's APD division is seeking a Principal Physical Design Engineer to lead block- and top-level...  ...for high-performance networking and AI/ML ASICs in San Jose. You will own floorplanning, synthesis, P&R, CTS, timing closure, and sign-off across advanced nodes... 

    Broadcom Corporation

    San Jose, CA
    2 days ago
  •  ...optimization. We are hiring an experienced Physical Design Engineer to join a high-performing silicon...  ...opportunity to work on cutting-edge ASIC/SoC designs and collaborate with...  ...ASIC/SoC designs while ensuring optimal timing, congestion, and power distribution.... 
    Contract work

    Cystems Logic Inc

    Sunnyvale, CA
    32 minutes ago
  • $145k - $234.5k

     ...Senior ASIC Design Verification Engineer (Hardware) Senior ASIC Design Verification Engineer (Hardware) Direct...  ...our employees generally work full time from our office with flexibility offered...  ...medical condition, national origin, physical or mental disability, political... 
    Full time
    Casual work
    Work at office

    Palo Alto Networks

    Santa Clara, CA
    3 days ago
  • $156.4k - $253k

     ...teams work from the office full time, with flexibility when it’s...  ...About the Role Join our ASIC team and help deliver the...  ...platforms. You will own module design from specification through...  ...world‑class verification and physical‑design engineers to hit aggressive... 
    Full time
    Work at office

    Palo Alto Networks, Inc.

    Santa Clara, CA
    3 days ago
  • $136k - $218.5k

     ...world. NVIDIA is looking for an Senior ASIC Design Engineer to join our Memory Subsystem Team!...  ...design verification/formal verification/physical design team to deliver a world-class solution...  ...including RTL design, synthesis and timing analysis using innovative CAD tools... 

    NVIDIA Corporation

    Santa Clara, CA
    2 days ago
  • $249.24k - $348.93k

    Sr ASIC Design Engineer - TeraWave### Sr ASIC Design Engineer - TeraWaveApply: San Diego, CA: Central Texas: Cupertino, CA: Full time: Posted Yesterday: R72403Application close date:Applications...  ...Python, TCL, Perl)* Experience with physical design flows and industry-... 
    Permanent employment
    Full time
    Temporary work
    Local area
    Remote work

    Blue Origin

    Cupertino, CA
    1 day ago
  •  ...Meta’s Silicon Engineering organization seeks a Staff ASIC Implementation Engineer to lead the physical implementation and synthesis of complex...  ...focuses on end-to-end flows, timing closure, and methodology...  ...architecture, and physical design teams to optimize area, power... 

    AnySilicon

    Sunnyvale, CA
    3 days ago
  •  ...Technologies group, you’ll help design and manufacture our next...  ...a mix of strategic engineering along with hands-on experience in physical design and large chip...  ...experiments, reviewing static timing, and physical design...  ...in all aspects of ASIC implementation including... 
    Temporary work

    Apple

    Santa Clara, CA
    4 days ago
  •  ...Accliive is seeking a senior engineer in the United States (California, San Jose) to lead end-to-end Physical Design. You will drive synthesis, physical verification, timing closure, CTS optimization, P&R, and floorplanning while collaborating closely with IC Design and... 

    Accliive Inc.

    San Jose, CA
    3 days ago
  • $213k - $287.5k

     ...organization within AWS Utility Computing) designs silicon and software that...  ...that were unimaginable a short time ago—even yesterday. Our custom chips...  .... We’re looking for an ASIC Physical Design Integration and Verification Engineer to join our backend team. The ideal... 
    Local area
    Flexible hours

    Amazon

    Cupertino, CA
    3 days ago
  •  ...Own physical implementation of accelerator blocks and top level: synthesis...  ..., and utilization Close timing, power, and area (PPA)...  ...delivery and density: power grid design, IR-drop and electromigration...  ...Master's degree in Electrical Engineering, Computer Engineering, or a related... 
    Full time

    RosaicLabs Inc

    Santa Clara, CA
    5 days ago
  • $155k - $222.6k

     ...Because full product development—from design to qualification to production—is within...  ...of the digital world.Your ImpactAs a Physical Design Engineer, you will play a key role in the full...  ...You will optimize floor planning and timing, analyze and improve backend design flows... 
    Full time
    Temporary work
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    2 days ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to ASIC Timing & Physical Design Engineer. Be the first to apply!