Senior ASIC Physical Design Engineer - Top-Level
Amazon Locker
Annapurna Labs, part of Amazon, seeks an ASIC Physical Design Engineer in Cupertino to drive floorplanning, placement, integration, and tapeout for advanced SoCs. You will collaborate with the FE team to translate RTL into robust physical designs, and lead DV/verification using Calibre, IC Validator and PVS across processes. The role requires 5+ years in physical verification, scripting, and strong communication. Experience with FC/Innovus flows and mentoring is preferred. #J-18808-Ljbffr
$136k - $218.5k
...Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect... ...network and last-level caches, working on... ...’s Degree in Electrical Engineering, Computer Engineering or... ...a deep understanding of ASIC design flow including RTL...SeniorFull time$136k - $218.5k
...inventiveness and intelligence.We are now looking for a motivated Senior ASIC Physical Design Engineer, Netlisting to join our dynamic and growing team. If you... ...high-frequency and low-power CPUs, GPUs, SoCs at block level, cluster level, and/or full chip level, with a focus on...SeniorFull timeShift work- ...technological advancements. Responsibilities: Lead ASIC front-end physical design and engineering workflow development for generative AI inference... ...frontend physical design at both block and full-chip levels. Drive optimization, implementation, and exploration...SeniorFull time
$213k - $287.5k
Annapurna Labs designs silicon and software that accelerates innovation. Customers choose... ...technologies. We’re looking for an ASIC Physical Design Engineer to help us trail-blaze new... ...backend physical design flows for chip-top/subsystems (FC/Innovus)- Expert knowledge...SuggestedLocal areaFlexible hours$100k
...solving hard problems. We are growing our team and looking for contributors of all seniorities.Tenstorrent is seeking an exceptional Senior-level Physical Design Engineer to drive top-level implementation of our complex AI and CPU System-on-Chip designs. You'll orchestrate...SuggestedPermanent employment$280k - $300k
Physical IC Design Engineer (Senior, Staff or Principal level)Locations: San Jose, CA or Colorado Springs, CO (relocation offered... ...demanding computing environments.Top Reasons to Work With UsWork on... ...implementation activities throughout the ASIC development lifecyclePerform RTL...SeniorWork at officeRelocation package$136k - $218.5k
...clocks group is looking for a top-notch ASIC engineer to join the team. The Team... ...collaborates with the front design team to understand the clocking... ...end team to help craft the physical floorplan of the chip. The... ...designUnderstanding of system level artifacts like power, noise,...SeniorFull timeWork experience placement$163k - $236k
Participate in the physical design of complex blocks.Contribute to the design and closure of the... ...:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science... ...integration within AI/ML-driven systems.As an ASIC Physical Design Engineer, you will...SeniorWorldwide- Qualcomm Technologies, Inc. in Santa Clara, California is seeking a Physical Design Engineer to contribute across ASIC/SoC projects, including floorplanning, CTS, and low-power strategies. The role involves executing the full physical design flow, collaborating with cross...Senior
- ...Tachyum is seeking a Physical Design Engineer in Sunnyvale, CA to drive PD for ultra‑high performance chips. You will collaborate with RTL teams... ...integrity strategies. The role requires strong Verilog know‑how, ASIC flow experience, and a track record mentoring engineers....Senior
- SPACE EXPLORATION TECHNOLOGIES CORP (SpaceX) in Sunnyvale, CA is looking for a Sr. SOC/ASIC Physical Design Engineer. The role involves developing cutting-edge silicon for deployment in space and improving physical design methodologies to enhance the Starlink network. Ideal...Senior
- ...Value Innovation Labs Inc. is seeking an experienced Physical Design Engineer to drive end-to-end ASIC/SoC implementation for advanced nodes. You will own the RTL-to-GDSII flow and collaborate with IP and foundry partners to deliver reliable, high-performance silicon....Senior
$170k - $230k
...Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is... ...Pay range: $170,000.00 - $230,000.00 per year. Your actual level and base salary will be determined on a case‑by‑case basis...SeniorPermanent employmentTemporary workWorldwideWeekend work- Qualcomm Technologies, Inc. in Santa Clara, CA is seeking talented Physical Design Engineers to join our growing SoC and ASIC Design organization. You will drive all stages of the physical design flow for high-performance ASICs/SoCs, including floorplanning, CTS, routing...Senior
$136k - $218.5k
...the world. NVIDIA is looking for an Senior ASIC Design Engineer to join our Memory Subsystem Team!Whatyou... ...verification/formal verification/physical design team to deliver a world-class... ...hardware-managed coherency and system level caches is a plusExperience with multiple...SeniorFull time$163k - $236k
Develop all aspects of ASIC Register Transfer Level to Graphic Data System... ...Performance, and Area (PPA) designs.Manage full-chip level physical implementation.Define... ...s degree in Electrical Engineering or equivalent practical... ...:Experience in top-level floorplanning, block...SeniorWorldwide$196k - $310.5k
We are now looking for a Senior ASIC Floorplan Design Engineer!NVIDIA is seeking a talented ASIC Floorplan Engineer... ...with architects, design leads, physical design leads and package leads, you... ...range is 196,000 USD - 310,500 USD for Level 5, and 232,000 USD - 368,000 USD for...SeniorFull time- ...Bolt Graphics, Inc. is looking for a Staff/Senior Staff Physical Design Engineer in Sunnyvale, CA. The role is critical in driving physical implementation... ...Electrical Engineering with 8–12 years of experience in ASIC physical design and a strong understanding of tools like...Senior
$168k - $264.5k
...EDA. NVIDIA's interposer designs are among the most... ...small group of high-impact engineers who define how that... ...workflows of the world's top interposer designers.What... ...with interposer and IC physical design.Strong expertise... ...USD - 264,500 USD for Level 4, and 196,000 USD - 31...SeniorFull time- ...Lumilens is seeking a Senior Physical Design Engineer to join our silicon design team, developing high‑performance ASICs on 5nm and 3nm TSMC nodes. You will own physical implementation from RTL to GDSII and drive timing and power closure for ultra‑high‑speed designs....Senior
$150k - $250k
...seeking a highly skilled and motivated ASIC Design Engineer to join our team and contribute to... ...SerDes, DSP, Architecture, Verification, Physical Design, and Systems teams to develop... ...performance. Contribute to block-level and top-level integration, verification, and...SeniorFor contractors$156.4k - $253k
...About the Role Join our ASIC team and help deliver the digital... .... You will own module design from specification through silicon... ...‑class verification and physical‑design engineers to hit aggressive performance... ...-architecture from high-level requirements. ~ Datapath design...SeniorFull timeWork at office- Synopsys, Inc. is seeking an experienced ASIC physical design engineer to drive complex flows from RTL to GDS. You will work directly with customers, translate constraints into concrete plans using Fusion Compiler or ICC2, and push for timely tapeouts at advanced nodes....Senior
$207k - $230k
...Discover more at As an Astera Labs STA Physical Design Engineer, Senior Principa l you will play a crucial... ...Labs' portfolio of connectivity ASICs used in the world's leading cloud... ...constraints refinement. Work with top level owners on defining and managing I/O...SeniorFlexible hours- ...MatX Inc. in Mountain View, CA, is seeking silicon physical design engineers to develop high-performance, power-efficient silicon for GenAI. You... ...role requires BS in Electrical Engineering and 8+ years of ASIC PD experience, with strong Python/TCL/Perl skills and collaboration...Senior
- ...NVIDIA is seeking a Senior ASIC Design Engineer to join our Memory Subsystem Team in Santa Clara. You... ...verification, formal verification and physical design to deliver a world-class memory... .... NVIDIA offers base salaries for Level 3 and Level 4, plus equity and benefits...Senior
$200k - $290k
...inference.About The Role:As a senior front-end design engineer, you will be a key part of... ...the design verification, physical design, software and system... ...the product.Debug silicon-level functional, timing, and power... ...managing external ASIC vendor through product development...SeniorRemote work- ...Bolt Graphics in Sunnyvale, CA, is seeking a Staff / Senior Staff Physical Design Engineer to drive full-chip physical implementation from netlist to GDSII, targeting timing, power, and area targets for high-performance graphics processors. This on-site role requires...SeniorWork at office
- ...Synopsys is the leader in engineering solutions from silicon... ...-leading silicon design, IP, simulation and analysis... ...of advanced-node physical design, where a 50ps timing... ...hands-on experience in ASIC physical design, implementation... ..., subsystem, or chip-level environments ~ Deep...Senior
$129.2k - $209k
...outcomes.Job SummaryYour Career As a Design Verification engineer on the ASIC team, you will ensure that the... ...who receive an offer at the posted level, the starting base salary (for non-... ...medical condition, national origin, physical or mental disability, political affiliation...SeniorFull timeCasual workWork at office
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