SOC Top Level Physical Design Engineer, Annapurna Labs
$213k - $287.5kAmazon Locker
Annapurna Labs designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago—even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world.Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, Trainium Systems (our custom designed machine learning inference and training datacenter servers). Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.Key job responsibilities- Drive full chip floorplan, placement, integration, PV signoff and tapeout- Collaborate with FE team to understand RTL and drive physical aspects early in design cycle- Define, execute and optimize next-generation physical verification and integration methodologies using industry-standard EDA tools (FC, Calibre, IC Validator)- Perform DRC (Design Rule Checking), LVS (Layout vs. Schematic), PERC (Programmable Electrical Rule Check) verification- Debug and resolve physical verification issues in collaboration with layout and design teams- Interface with foundries for MT form, rule deck updates and violation waivers; Develop and maintain verification runsets and methodologies- Mentor junior engineers on physical verification methodologies and closureBasic qualifications- Experience scripting with Python, Perl, Bash or PowerShell- BS + 10yrs or MS + 7yrs in EE/CS, or related field- 5+ in physical verification for advanced technology nodes- Design Flow Knowledge: Understanding of backend physical design flows for chip-top/subsystems (FC/Innovus)- Expert knowledge of industry-standard physical verification tools (Calibre, IC Validator, PVS)- Strong understanding of semiconductor manufacturing processes and design rules- Proven track record of successful tape-outs- Strong communication and collaboration abilitiesPreferred qualification - Experience in mentoring, leading, or managing more junior engineers- Experience with integration and verification in advanced nodes [5nm or below]- Knowledge of custom and digital design flows- Expertise with DFM (Design for Manufacturing) methodologies- Expertise in reliability verification (ESD, EM, IR drop)- Experience solving physical design challenges across various technologies such as DDR, PCIe, fabrics etc.- Experience in extraction of design parameters, QOR metrics, and analyzing trendsAmazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at .USA, CA, Cupertino - 213,000.00 - 287,500.00 USD annuallyUSA, TX, Austin - 185,200.00 - 250,000.00 USD annually
$100k
...seniorities.Tenstorrent is seeking an exceptional Senior-level Physical Design Engineer to drive top-level implementation of our complex AI and CPU System-... ...aggressive schedules.What We Need8+ years of top-level SOC physical design experience on complex, multi-million...SuggestedPermanent employment$183k - $247.6k
Annapurna Labs (our organization within AWS Utility Computing) designs silicon and software that accelerates... ....Custom SoCs (System on Chip)... ...looking for an ASIC Physical Design... ...and Verification Engineer to join our backend... ...mix of experience levels and tenures, and...SuggestedLocal areaFlexible hours$176.6k - $247.3k
...Acceleration team you’ll be responsible for the design and optimization of Hardware in our... ...flows for block and full-chip level static timing analysis • Write, debug... ...collaboration and teamwork with other physical design engineers as well as with the RTL/Arch. teams...SuggestedFull timeLocal areaFlexible hours$183k - $247.6k
...Inferentia and Trainium SoCs that are used to... ...As a Sr. SoC Power Engineer, you’ll contribute... ...at the ground level by modeling and estimating... ...every stage of the design from early RTL to... ...teams, and Physical Design experts - defining... ...measurements in the lab and correlate back...SuggestedLocal areaFlexible hours$175k - $280k
...with the ultimate goal of enabling human life on Mars.SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING)At SpaceX we’re leveraging our... ...Engineer/Senior: $175,000.00 - $280,000.00/per year Your actual level and base salary will be determined on a case-by-case...SuggestedPermanent employmentTemporary workWorldwideWeekend work$140k - $229.8k
Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary:... ...ASIC Team is actively seeking candidates for several physical design engineering positions in our SOC and core design team. As a physical design engineer...Work experience placementWork from home$168k - $264.5k
...looking for best-in-class Senior Physical Design Methodology Engineer, PPA Fusion Compiler to... ...of graphics processors and SOCs.Key responsibility includes... ...design approach, top-down design, budgeting, timing... ...,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,50...Full time$210k - $250k
...first silicon and system designed from the ground up for AI... ...mode and has a world-class engineering team with decades of experience... ...Define the Physical Assembly of SOC. Involving all aspects of... .... Design and architect top level and block level floor planning...- ...Job Title Physical Design Engineer Location Sunnyvale, CA OR Austin, TX Duration Long term Experience... ...skilled Physical Design Engineer to work at block level and/or top level for high-performance ASICs, SoCs, and custom silicon chips with strong scripting...
$157.3k - $212.8k
...countries around the world.We are seeking an experienced Design Verification Engineers to build the next generation of our cloud server... ...skills- Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testingPreferred qualification - Master...Local areaFlexible hours$136k - $212.8k
..., or a PhD with 2+ years in Electrical Engineering or Computer Science. We expect strong... .... We expect understanding of ASIC physical design from RTL through GDSII. We require familiarity... ...Preferred: experience with circuit-level analysis using SPICE or SPECTRE....Full time$220.92k - $311.89k
...highly experienced a Director, SoC Design Engineering, to lead the functional... ...execute block, subsystem, and SoC-level verification plans,... ...Foundry Enablement (supporting top customers and validating technologies... ...origin, ancestry, age, physical or mental disability,...Full timeWork experience placementLocal areaImmediate startWorldwideShift workNight shift$157.3k - $212.8k
...across all industries. Custom SoCs (System on Chip) live at the... ...you’ll be responsible for the design and optimization of hardware... ...responsibilities As an ASIC Design Engineer, you will: • Develop and... ...engines, debug and system level architectures - Have a strong...Full timeLocal areaWork from homeFlexible hours$2,500 per month
...frontier intelligence. We co-design chips, racks, software,... ...hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the... ...inference clusters. As a Physical Design Engineer, you will own block-level implementation from synthesis...Work at officeRelocation package$183k - $247.6k
...develops the Inferentia and Trainium SOCs that are used to power today’s AI workloads... .... We are seeking experienced Design Verification Engineers to build the next generation of our cloud... ...Verify custom chip designs at the SOC level- Integrate 3rd party IPs and VIPs into...Local areaWork from homeFlexible hours$170k - $220k
...description: We're looking for a hands-on Physical Design Engineer to support complex SoC projects for our client who designs... ...constraint validationChip/block-level floorplanning and pin... ...pipeline of new technology projects for top companies. Employees are real contributors...Local area$168k - $264.5k
...EDA. NVIDIA's interposer designs are among the most... ...small group of high-impact engineers who define how that... ...workflows of the world's top interposer designers.What... ...with interposer and IC physical design.Strong expertise... ...USD - 264,500 USD for Level 4, and 196,000 USD - 31...Full time$168k - $264.5k
...impact on the world.We are looking for a physical design engineer to be a part of NVIDIA’s physical... ...implementation of GPU, CPU, Network processors and SOC, with emphasis on PPA (Power,... ...range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level...Full timeRemote work$100k
...all seniorities.Tenstorrent is looking for a mid- to senior-level Physical Design Engineer with a strong background in static timing analysis (STA).... ...convergence across blocks, partitions, sections, and top-level designs; generate and validate timing models and publish...Permanent employment$100k
...seniorities.Tenstorrent is looking for a Physical Design CPU Methodology Engineer who defines and drives the... ...design expertise with organization-level technical leadership, enabling predictable... ...Design Engineer with 10+ years of ASIC/SoC/CPU experience, ideally focused on...Permanent employmentRemote work$136k - $218.5k
...intelligence.We are now looking for a motivated Senior ASIC Physical Design Engineer, Netlisting to join our dynamic and growing team. If you... ...design of high-frequency and low-power CPUs, GPUs, SoCs at block level, cluster level, and/or full chip level, with a focus on...Full timeShift work$100k
...seniorities.Tenstorrent is seeking a talented Physical Design Engineer to implement high-performance blocks... ...candidates at various experience levels for this role. During the interview process... ...-on engineer with deep expertise in SOC/ASIC physical design and a track record...Permanent employment$136k - $218.5k
NVIDIA is looking for a Senior SOC Design Engineer to join our SOC Design team! At NVIDIA, you'll... ...partnering with experts in ASIC design, Physical design, CAD, Package Design, Software,... ...GPUs and SOCsDevelop and refine system-level methodologies and tools for efficient SOC...Full time$230k - $280k
...works with the leading model labs, global enterprises, and cutting... ...a member of our tight knit physical design team, you will be working on... ...combination of traditional ASIC/SoC physical design skills,... ...experience.Strong knowledge of block level and full-chip physical...$141.91k - $200.34k
...Description: The Role and ImpactAs a SoC Logic Design Engineer, you will play a pivotal role in advancing... ..., coding at the register transfer level (RTL), and optimizing performance to deliver... ...design integrity and readiness for physical implementationReview verification...Full timeLocal areaImmediate startWorldwideShift workNight shift$160k - $275k
...models run as efficiently as allowed by physics, bringing the world years ahead in AI... ...availability. MatX is seeking silicon physical design engineers to join our team as we create best-in-... ...subsystems or subsets and/or chip-level Physical Design deliverables including...Daily paidFull timeWork experience placementLocal areaRemote workMonday to FridayFlexible hours$82.08k - $193.44k
...About the job you’re considering As a Physical Design Engineer , you will work on complex digital and... ...and DRC issues at both chip and block levels. Collaborate with design, layout,... ...candidates to be hired at or near the top of the posted compensation range. In...Full timeLocal area$126.8k - $190.9k
...forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group,... ...not limited to: Generate block/chip level static timing constraints. Build full... ...deep design experience in high PHY and/or SOC designs Deep Knowledge about industry...Relocation- ...Physical Design Engineer - Location: San Jose OR Irvine, CA Our client develops specialized semiconductor... ...are seeking an experienced Senior SoC/ASIC Physical Design Engineer to take... ...full-chip PD execution: Handle block-level and top-level implementation—including...Full timeH1bVisa sponsorshipRelocation package
$151k - $251.8k
...and Advanced Computing Lab (ACL), we are... ...ResponsibilitiesAs a Design Verification Engineer, you will contribute... ...across both block- and top-level environments. You will... ...the needs of complex SoC designs.You play a role... ...collaborate with design, SoC, physical design, and...Hourly payFull timeRelocation
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to SOC Top Level Physical Design Engineer, Annapurna Labs. Be the first to apply!
- soc design engineer Cupertino, CA
- data center design engineer Cupertino, CA
- new product engineer Cupertino, CA
- rtl design engineer Cupertino, CA
- design engineer Cupertino, CA
- product engineer Cupertino, CA
- product design engineer Cupertino, CA
- senior software design engineer Cupertino, CA
- digital design engineer Cupertino, CA
- lab engineer Cupertino, CA



