Senior 3DIC Physical Design Engineer (Full-Stack ASIC)
Value Innovation Labs Inc.
Value Innovation Labs Inc. is seeking an experienced Physical Design Engineer to drive end-to-end ASIC/SoC implementation for advanced nodes. You will own the RTL-to-GDSII flow and collaborate with IP and foundry partners to deliver reliable, high-performance silicon. The role emphasizes 3D-IC integration, power-aware design, and automated flows. You will lead timing closure (>1GHz), CTS, floorplanning, and sign-off activities while mentoring junior engineers in Tcl/Python/Perl scripting. #J-18808-Ljbffr
Vacancy posted 2 days ago
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