Physical Design Timing Engineer
$220k - $320kDensityAI
Job Description
Job Description
About the role
Own Full chip and Block timing methodologies and execution to-signoff of our AI accelerator silicon. Work with chip-design and software teams driving DensityAI's AI accelerator program from first silicon through scale-out.
What you'll do- Own Full chip and Block timing methodologies and execution to-signoff of our AI accelerator silicon.
- Use and develop AI-assisted tool flows to accelerate physical design timing convergence and signoff timelines.
- Exceptional abilities across the full physical design flow (synthesis, place & route, CTS, signoff) with emphasis on timing flows and methodologies
- 10+ years of experience on very high performance designs at advanced technology nodes (7nm or better) and 2.5D/3D timing flows
- Hands-on with industry-standard PD tools (Cadence Innovus, Synopsys Fusion Compiler, or equivalent) and signoff (PrimeTime, Tempus, or equivalent)
- Demonstrated ability to work closely with architects, RTL designers, EDA vendors, and foundries to design and sign off complex chips
- Post silicon characterization and process targeting experience is highly desirable
- (Optional) Multi-die packaging (CoWoS, 2.5D / 3D), thermal / IR / EM signoff, signal integrity, or DFT-aware physical design
Final offers depend on level, location, and skills relevant to the role. Additional compensation: equity grant per company guidelines; medical / dental / vision; 401(k); standard PTO.
Visa SponsorshipDensityAI sponsors qualified candidates for H-1B, O-1, TN, E-3, and other employment-based visas, and we welcome applicants on F-1 OPT and STEM-OPT. Work authorization is required at start; we provide immigration support to secure or transfer status.
Export ControlsAspects of this role may involve access to information subject to U.S. export controls (EAR/ITAR). We may discuss licensing or scope adjustments during the interview.
Equal OpportunityDensityAI is an Equal Opportunity Employer. We do not discriminate on the basis of race, color, religious creed, national origin, ancestry, physical or mental disability, medical condition, genetic information, marital status, sex, gender, gender identity, gender expression, age (40+), sexual orientation, military or veteran status, pregnancy, or any other status protected by law. We comply with the California CROWN Act and provide reasonable accommodations on request.
Full compensation packages are based on candidate experience and relevant certifications.
California pay range
$220,000—$320,000 USD
Compensation
Final offers depend on level, location, and skills relevant to the role. Additional compensation: equity grant per company guidelines; medical / dental / vision; 401(k); standard PTO.
Visa SponsorshipDensityAI sponsors qualified candidates for H-1B, O-1, TN, E-3, and other employment-based visas, and we welcome applicants on F-1 OPT and STEM-OPT. Work authorization is required at start; we provide immigration support to secure or transfer status.
Export ControlsAspects of this role may involve access to information subject to U.S. export controls (EAR/ITAR). We may discuss licensing or scope adjustments during the interview.
Equal OpportunityDensityAI is an Equal Opportunity Employer. We do not discriminate on the basis of race, color, religious creed, national origin, ancestry, physical or mental disability, medical condition, genetic information, marital status, sex, gender, gender identity, gender expression, age (40+), sexual orientation, military or veteran status, pregnancy, or any other status protected by law. We comply with the California CROWN Act and provide reasonable accommodations on request.
$136k - $218.5k
...most forward-thinking and hardworking people in the world working for us. We are now looking for a motivated Senior Physical Design and Timing Engineer to join our dynamic and growing team. What you'll be doing: Drive physical design and timing of high-frequency...SuggestedFull time$125.7k - $203.1k
...Because full product development—from design to qualification to production—is within... ...the digital world. Your Impact As a Physical Design Engineer, you will play a key role in the full... ...You will optimize floor planning and timing, analyze and improve backend design flows...SuggestedFull timeTemporary workWork experience placementInternshipLocal areaFlexible hours$157.3k - $212.8k
...Acceleration team you'll be responsible for the design and optimization of Hardware in our... ...for block and full-chip level static timing analysis • Write, debug & validate... ...collaboration and teamwork with other physical design engineers as well as with the RTL/Arch. teams...SuggestedFull timeLocal areaFlexible hours- ...NVIDIA Corporation is seeking a Senior Physical Design and Timing Engineer to lead high-frequency and low-power design across CPUs, GPUs, LPUs and SoCs. The role emphasizes RTL-to-tapeout, floorplanning, and ECO troubleshooting with cross-functional collaboration across...Suggested
$136k - $212.8k
...years, or a PhD with 2+ years in Electrical Engineering or Computer Science. We expect strong grounding in timing analysis fundamentals. We require 1+ years... ...similar tools. We expect understanding of ASIC physical design from RTL through GDSII. We require...SuggestedFull time$230k - $280k
...Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry... ...ultra high-speed inference.About The RoleJoin our close-knit physical design team where you'll excel in synthesizing, placing, and routing...$180k - $260k
...What We Need: We are looking for a Principal Physical Design Engineer to serve as an early member of our physical design team. You will... ...designs from floorplan through signoff, solve difficult timing and implementation problems, and provide technical leadership...- ...We Are Synopsys is the leader in engineering solutions from silicon to systems,... ...We deliver industry-leading silicon design, IP, simulation and analysis... ...years in the trenches of advanced-node physical design, where a 50ps timing violation at 3nm is not an abstraction...
$87.4k - $165k
...Position: Physical Design Engineer II (IC) Job Description: Job Responsibilities: Execute synthesis, PNR, and STA for assigned partitions... ...design and implementation, encompassing synthesis, PnR, timing convergence and physical verification. ~ Proficiency in...Hourly payFull timeWork experience placement- ...Job description: We're looking for a hands-on Physical Design Engineer to support complex SoC projects for our client who designs and delivers... ...preferred.Key Responsibilities:Pre-layout STA for feasibility and timing constraint validationChip/block-level floorplanning and pin...Local area
- ...Technologies group, you’ll help design and manufacture our next-generation... ...role requires a mix of strategic engineering along with hands-on experience in physical design and large chip integration... ...experiments, reviewing static timing, and physical design verification...Temporary work
$2,000 per month
...would be impossible with GPUs, like real-time video generation models and extremely... ...-tier investors and staffed by leading engineers, Etched is redefining the infrastructure... ...Etched is looking for exceptional Physical Design engineers to join our team. In this role...Work at officeRelocation package- ...Physical Design Engineer - Location: San Jose OR Irvine, CA Our client develops specialized semiconductor solutions for the edge, building processors... ..., floor planning, power grid creation, place and route, timing analysis, noise analysis, physical verification, EM/IR...Full timeH1bVisa sponsorshipRelocation package
$133.2k - $192.83k
## Physical Design EngineerApplylocations: San Jose, California, United Statestime type: Full... ...Role**We are seeking a **Physical Design Engineer** to join our Silicon Engineering and... ...designs from RTL through GDSII while driving timing closure, power optimization, physical...Local areaShift work$2,000 per month
...frontier intelligence. We co-design chips, racks, software, and manufacturing... ...and staffed by leading engineers, Etched is redefining the... ...is looking for exceptional Physical Design engineers to join our... ...implementation and verification, drive timing closure and PPA optimization,...Work at officeRelocation package$100k
...contributors of all seniorities.Tenstorrent is seeking a talented Physical Design Engineer to implement high-performance blocks for our industry-... ...EE/ECE/CE/CS with proven experience in synthesis, PnR, and timing closure on taped-out designs.Expertise with industry-...Permanent employment$143.8k - $230k
...encompassing 3D and 2.5D interconnects. We are seeking a design engineer with physical layout skills to develop our next generation products with... ...~ company paid holidays ~ paid sick leave ~ vacation time The company follows all applicable laws for Paid Family...Work experience placementLocal areaWorldwide$150k - $170k
...eInfochips (An Arrow Company) Semiconductor and Engineering Talent Acquisition Professional !!! Position: Sr. Physical Design Engineer (eInfochips Inc) Experience: 10+... ...closure at both block and top levels, addressing timing, congestion, IR-drop, and physical verification...Full timeTemporary workWork at office$210k - $250k
...the first silicon and system designed from the ground up for AI and... ...speed training job completion times and tokens-per-second for... ...execution mode and has a world-class engineering team with decades of... ...Responsibilities Define the Physical Assembly of SOC. Involving all...$150.4k - $225.3k
...throughout the USA. Work with logic design team to understand partition architecture and drive physical aspects early in design cycle.... ...schedule and design goals. Time physical & electrical... ...equivalent in Electrical and Computer Engineering or related field and 1 year of...Relocation- ...interconnects to scalable photonic engines, Lumilens is unlocking a new... .... Every line of code, every design decision, every breakthrough... ...We are seeking a Senior Physical Design Engineer to join our... ...implementation from RTL to GDSII, drive timing and power closure for ultra‑...
- ...you will lead and contribute to advanced-node physical design for complex ASIC and SoC products, driving implementation, timing closure, signoff, and design optimization... ...architecture, RTL, CAD, technology, and product engineering teams, you will help deliver high-quality...
- ...Overview: Job Title: Senior Physical Design Engineer Location: San Jose ,CA - Onsite Experience level: 8-10 years Candidate Roles... ...Perform RTL to GDSII tasks such Synthesis, PnR, CTS, Statis Timing Analysis, Physical verification and ensuring clean sign off...
$138k - $197k
...high performance ASIC’s and SoC’s, from design through manufacturing, packaging, and test... ..., power, area, and reliability using physical design and circuit techniques.Define optimal... ...:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science,...Worldwide$200k
...Role Overview We are looking for talented Design Verification Engineers to help verify and deliver Velaura’s next-generation Physical AI SoC. In this role, you will work closely... ...performance, latency, bandwidth, QoS, and real-time system behavior under representative...Full timeFlexible hours$126.8k - $190.9k
...opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the... ...center of a PHY design effort working with architecture, CAD, timing and logic design teams, with a critical impact on...Relocation$100k
...contributors of all seniorities. Tenstorrent is looking for a Physical Design CPU Methodology Engineer who defines and drives the implementation methodology,... ...RTL-to-GDS implementation and signoff, including timing closure, power optimization, SI, EM/IR, extraction, and...Full timeRemote work$100k
...looking for contributors of all seniorities. As a Senior Chiplet Physical Design Engineer at Tenstorrent, you will work on a high-profile, cutting-... ...across synthesis, P&R, and closure. - Proven expertise in timing closure, ECO flows, and PV convergence at block and chip...Full timeRemote work- ...Job Description Job Description Physical Design Engineer Building AI chips that are hard-coded for individual model architectures.... ...to GDSII sign-off ~ Experience with back-end design and timing closure on 3nm-7nm ~ Experience with UPF-based low power...
$180k - $255k
...greater energy efficiency, and faster time to value. About the roel SambaNova... ...looking for a talented and motivated Physical design flow owner/lead to help us build state... ...PhD degree in Computer Science, Computer Engineering or Electrical Engineering ~5+ years...Full timeTemporary workLocal areaWorldwideFlexible hours
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to Physical Design Timing Engineer. Be the first to apply!
- senior software design engineer Mountain View, CA
- product design engineer Mountain View, CA
- senior manager product engineering Mountain View, CA
- senior product design engineer Mountain View, CA
- senior design verification engineer Mountain View, CA
- sr. product engineer Mountain View, CA
- new product engineer Mountain View, CA
- design engineer Mountain View, CA
- data center design engineer Mountain View, CA
- physical design engineer Mountain View, CA





