Lead Physical Design Engineer: ASIC/SoC Layout & Timing
ACTSearch
A semiconductor company based in Pleasanton is seeking a Physical Design (Layout) Lead to oversee ASIC physical design activities. The ideal candidate will have over 10 years of experience in the implementation of ASIC/SOC, including low power design and physical design verification. Responsibilities include leading design activities and collaborating with RTL engineers on methodology improvements. This role offers the opportunity to be instrumental in resolving design issues and improving efficiency in a dynamic environment. #J-18808-Ljbffr ACTSearch
Vacancy posted 3 days ago
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