Senior Logic Design Engineer, Cache Coherent Interconnects
$136k - $218.5kNvidia
We are now looking for a Senior Logic Design Engineer!As a member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip and off-chip interconnect network, MP coherency and last-level and system caches, focusing on such tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure, supporting verification and implementation. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence! We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.What you'll be doing:As a member of our core CPU team, you'll own and be responsible for crafting and timely delivery of a specific unit on the chip.Day to day tasks include: writing readable high performance and low power RTL, Synthesis and Timing closure, and design documentation.Collaborate with our verification team to verify the correctness of your unit.Work with implementation to achieve your timing, area, performance and power goals.Assist with timing closure of super units.What we need to see:Master’s Degree in Electrical Engineering, Computer Engineering or Computer Science or equivalent experience.5+ years of experience in processor or other related high performance semiconductor designs.Verilog expertise required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.Strong communication and interpersonal skills are required along with the work in a dynamic, global team. Your successful track record of mentoring junior engineers and interns a huge plus.A strong background in computer architecture, cache coherency or high speed interconnects is helpfulNVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and hardworking people in the world working for us. Are you creative and autonomous and love the challenge of crafting the fastest and most power efficient chips in their class? If so, we want to hear from you.#LI-HybridYour base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.You will also be eligible for equity and benefits.Applications for this job will be accepted at least until March 22, 2026.This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes.NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.SummaryLocation: US, CA, Santa Clara; US, OR, HillsboroType: Full time
$136k - $218.5k
As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design... ...collaborating closely with the logic design team on micro-architecture definition... ...see:Master’s Degree in Electrical Engineering, Computer Engineering or Computer...SeniorFull time$168k - $264.5k
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We are now looking for a Senior ASIC Design Engineer.NVIDIA is seeking ASIC Design Engineers to... ...synchronization & bus protocols, interconnect networks and/or caches.Great understanding of ASIC... ...including RTL design, verification, logic synthesis and timing analysis.Exposure...SeniorFull timeWork experience placement$221.7k - $364.8k
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...capacity, we are presented with design challenges exacerbated by... ...on crafting special purpose cache and controller which is part... ...tradeoffsExperience with multi-processor cache coherence protocolsKnowledge of high-... ...coherent memory systems or interconnect architecturesKnowledge of...Relocation$164.47k - $311.89k
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Job Title: Senior ASIC Design EngineerJob Location: Santa Clara, CA or Boston, MACompensation... ...a highly skilled Senior ASIC Design Engineer to lead the design and development of... ...and design of memory subsystems and cache coherence mechanisms.Mentor junior engineers and...Senior$168k - $264.5k
We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing Power... ...and further translate these into a coherent set of voltage regulator features and... ...innovative solutions addressing packaging, interconnect, physical design, electrical and...SeniorFull time$136k - $218.5k
...group delivers innovative PHY designs that power the most powerful... ...NVIDIA's high-performance interconnect protocols: NVLINK, Ethernet,... ...or M.S. degree in Electrical Engineering or equivalent experience.5+... ...Verilog or System Verilog, logic design concepts, and typical...SeniorFull time- ...assertions (SVA), and functional coverage. Verify CPU subsystem functionality, interconnects, interrupts, coherency, power management, and exception handling. Execute regressions, debug RTL/design issues, and drive functional and code coverage closure. Collaborate with...Senior
$135.9k - $201.13k
...lead. Your Team, Your ImpactAs a Senior Staff Digital ASIC Design Engineer at Marvell, you will join the DCE... ...next generation Ethernet and optical interconnects. You’ll work closely with experts... ...nodes.Lead integration of digital logic into larger subsystems and top‑level...SeniorPermanent employmentFull timeInternshipWork from home$200k - $300k
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About the role As a Senior Design Engineer, you will be responsible for all aspects of front-end ASIC... ...and verification of complex logic blocks. You will collaborate with PD,... ...solutions. Our high-speed copper and optical interconnect products deliver industry-leading power...Senior$129.3k - $194.7k
...Silicon Technologies group, you’ll help design and manufacture our next-generation... ...with their devices. The Graphics Cache Hierarchy Verification Engineer will be responsible for the pre-... ...including Caches, Memory Management Unit, Interconnects and Link interface units. This...Relocation- Responsibilities: • Architect, design and implement new features, performance improvements... ...execution units; load-store unit; cache and memory subsystems. • Knowledge of RISC... ...work well with others and a belief that engineering is a team sport. • Knowledge of at least...Senior
$136k - $218.5k
We are looking for an Engineer to verify the design and implementation of the world’s leading SoC's and GPU's. This position offers the opportunity... ...'ll closely with multi-functional teams, circuit and logic design, verification, test engineering to accomplish tasksWhat...SeniorFull time$168k - $264.5k
We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing team. If you are looking for a challenging and exciting... ...to flash ADC design is a plusExperience with RTL, logic synthesis and verification, knowledge of Place and Route,...SeniorFull time$168k - $264.5k
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...competitive edge in an increasingly interconnected world. Our solutions are designed to not only meet the current... ...prestigious awards, such as Best Engineering Team, Best Company for Diversity,... ...EngineeringExperience level: Mid-Senior LevelIndustry: Computer NetworkingSeniorFlexible hours$196k - $310.5k
We are now looking for a Senior ASIC Floorplan Design Engineer!NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world... ...with the ASIC design team to identify area, interconnect and floorplan improvement opportunitiesSolve timing and...SeniorFull time
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