Technical Staff - Embedded Systems Architect

Technical Staff - Embedded Systems Architect The Electronics for Contested Space Group develops advanced electronic systems and technology for the protection of our Nation’s most important space capabilities. We design and develop state‑of‑the‑art satellites and satellite payloads, novel concepts for resilient space architectures, and the Nation’s most sensitive radars, optics, and passive RF systems. The group also provides engineering rigor and experience to some of the most critical National Security programs through Laboratory‑wide collaboration and acts in an advisory capacity to the U.S. Government. Examples of recent projects include the prototyping of electronic systems and effects, hardware‑in‑the‑loop testing of tactically relevant payloads with surrogate threat systems, developing RF subsystems for satellites, and analysis of spacecraft mission dynamics, environments, and resiliency. Job Description Group 94, Electronics for Contested Space, is seeking an embedded systems architect to lead the design, development and fielding embedded systems to support novel space applications. The successful candidate will be able to contribute to multi‑disciplinary teams executing advanced research and independently solve technical challenges. Occasional travel to support field exercises, presentations to sponsors and the community, and other events may be required. Applicants must have significant coursework and/or experience in at least one of the following areas: digital (FPGA‑based) circuits, microcontroller design and/or embedded systems. Previous experience with runtime optimization, system architecture design, and integration of hardware and software is desirable. Experience with laboratory/field test equipment (spectrum analyzers, digital oscilloscopes, logic analyzers, etc.) is desirable. Requirements A Master’s degree or PhD in electrical engineering, computer engineering or another relevant technical field with 8 years of experience. A bachelor’s degree or equivalent and at least 10 years of relevant experience will be considered Experience developing synthesizable VHDL, Verilog, and/or SystemVerilog Experience implementing FPGA designs in hardware, including the creation of constraint files Experience testing and debugging firmware designs in both simulation and in hardware Experience implementing and integrating with digital interfaces, such as SPI, PCIe and Gigabit Ethernet Laboratory experience, including interface debugging and verification, at the circuit card assembly level Digital signal processing experience in either analysis and/or implementation Demonstrable ability to work responsibly and safely in laboratory and assembly environments Develop respectful, productive working relationships Communicate clearly, precisely, and concisely to technical and non‑technical audiences Solve broad and/or complex technical or engineering problems Learn and apply advanced technical knowledge quickly and proficiently Active Top Secret Security Clearance highly desired Desired Skills Expertise in computer architecture, particularly with respect to making trades between bare‑metal, or real‑time operating systems Ability to operate in a Linux development environment Familiarity with scripting and task automation leveraging Python, bash, TCL or perl Familiarity with MATLAB, Python, C/C++ or other scientific programming languages Experience working with modern development best practices, including use of revision control Hardware design experience, including schematic capture, layout, routing and initial bring up Salary Range Recent Graduate Hiring Range: $145,200-$170,000 Experienced Hiring Range: $145,200-$220,000 Disclaimer MIT Lincoln Laboratory provides a typical hiring range as a good faith estimate of what we reasonably expect to offer for this position at the time of posting. The final salary offered to a selected candidate will depend on various factors, including but not limited to the scope and responsibilities of the role, the candidate’s experience, skills and education/training, internal equity considerations and applicable legal requirements. This range reflects base salary only and does not include additional forms of compensation or benefits. Benefits Comprehensive health, dental, and vision plans MIT‑funded pension Matching 401(k) Paid leave (including vacation, sick, parental, military, etc.) Tuition reimbursement and continuing education programs Security Clearance Selected candidate will be subject to a pre‑employment background investigation and must be able to obtain and maintain a Secret level DoD security clearance. Equal Employment Opportunity MIT Lincoln Laboratory is an Equal Employment Opportunity (EEO) employer. All qualified applicants will receive consideration for employment and will not be discriminated against on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, age, veteran status, disability status, or genetic information; U.S. citizenship is required. #J-18808-Ljbffr