Senior Chip Design Engineer : 26-02794
$85 - $93.29 per hourAkraya, Inc.
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Primary Skills: Digital ASIC design (advanced), SystemVerilog verification (advanced), RTL to GDSII flow (intermediate), Synopsys VCS (advanced), Synopsys Design Compiler (advanced)
Contract Type: W2
Duration: 3 Months with possible extension
Location: Bellevue, WA ()
Pay Range: $85.00-$93.29 Per hour
LP
Job Summary:This role involves designing and verifying digital silicon chips, ensuring that training environments accurately reflect real-world chip development processes. You will critically assess design tasks, establish standards for correct solutions, and collaborate with teams building these training simulations. Your expertise will be crucial in identifying discrepancies between simulated tasks and actual engineering practices. Key Responsibilities:
- Design and verify digital silicon for complex integrated circuits.
- Develop and validate realistic chip design training scenarios.
- Review RTL code and assertion-based verification strategies.
- Analyze and define quality benchmarks for design solutions.
- Partner with training development teams to enhance realism.
- Extensive experience in digital ASIC or SoC design.
- Proficient in SystemVerilog for both design and verification.
- Solid understanding of the RTL to GDSII implementation flow.
Akraya is an award-winning IT staffing firm consistently recognized for our commitment to excellence and a thriving work environment Most recently, we were recognized Stevie Employer of the Year 2025, SIA Best Staffing Firm to work for 2025, Inc 5000 Best Workspaces in US (2025 & 2024) and Glassdoor's Best Places to Work (2023 & 2022)! Industry Leaders in Tech Staffing
As Talent solutions provider for Fortune 100 Organizations, Akraya's industry recognitions solidify our leadership position in the IT staffing space. We don't just connect you with great jobs, we connect you with a workplace that inspires! Join Akraya Today!
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