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Senior ASIC RTL Design Engineer — Space-Grade SoC Innovator

Jobleads-US

United States Digital Space LLC is seeking a Senior RTL Design Engineer to develop next-generation ASICs for space and ground infrastructure. You will define micro-architecture, implement RTL in Verilog/SystemVerilog, and collaborate with verification to ensure fully verified designs for silicon bring-up.

The role requires 5+ years in RTL implementation, experience with embedded CPU subsystems, and proficiency in standard bus protocols like AXI/AHB.

#J-18808-Ljbffr Jobleads-US
Vacancy posted 2 days ago
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