Senior Analog Mixed-Signal Engineer - AI Hardware

Job Description

Job Description

Senior Analog Mixed-Signal Engineer - AI Hardware

Job Title: Senior Analog Mixed-Signal Engineer - AI Hardware
Job Location: Palo Alto, CA, Austin, TX, or Ann Arbor, MI - open to remote for strong candidates!
Compensation: $150K - $250K base DOE plus equity
Requirements: Analog / Mixed-Signal IC Design, Data Converters, Cadence Virtuoso, In-Memory Compute

Position Overview
We are seeking a Senior Analog Mixed-Signal Engineer to drive circuit architecture, design, and verification for next-generation AI accelerator hardware. This role focuses on mixed-signal and analog compute building blocks including high-performance ADCs/DACs, data converter interfaces, and in-memory/analog compute elements. You will collaborate with system architects, digital design teams, and process/device engineers to optimize performance, power, and area for AI workloads, and deliver robust, silicon-proven IP and chiplets for production.

Key Responsibilities

• Architect, design, and implement high-performance analog and mixed-signal circuits (ADCs, DACs, comparators, biasing, clocks, and interfaces) for AI accelerator frontend and compute elements.
• Develop and simulate data converters and analog compute building blocks using Cadence Virtuoso and SPICE; perform corner, PVT, and Monte Carlo analysis to ensure yield and robustness.
• Create Verilog-A models and SystemVerilog RNM (Real-Number Modeling) representations for behavioral system integration and fast architecture exploration.
• Collaborate with digital and architecture teams to define system requirements, specify mixed-signal interfaces, and co-optimize algorithms and circuit implementations for AI workloads.
• Lead characterization, bring-up, and validation of prototypes in the lab; analyze silicon data, debug failures, and implement corrective actions.
• Design and evaluate in-memory compute and analog compute approaches, including modeling of nonvolatile memory elements (Flash, emerging NVM) and assessing tradeoffs for AI accelerator integration.
• Develop Python/NumPy models for algorithmic-to-circuit mapping, performance estimation, and co-simulation with device/circuit models.
• Mentor junior engineers, drive design reviews, and contribute to IP development, documentation, and transfer to test and production teams.
• Drive continuous improvement in design flows, automated testbenches, and mixed-signal verification methodology to accelerate time-to-market.

Qualifications

• Masters degree or PhD in Electrical Engineering or related field with 5+ years experience in analog/mixed-signal IC design for high-performance applications (AI, communications, or sensors).
• Demonstrated expertise in Analog/Mixed-Signal IC Design and system-level circuit architecture.
• Strong experience designing and characterizing Data Converters (ADC, DAC) and related analog frontend circuits.
• Proficiency with Cadence Virtuoso schematic/layout, Spectre/ SPICE simulation, and hands-on experience with PVT and Monte Carlo flows.
• Skilled in Verilog-A modeling and SystemVerilog RNM (Real-Number Modeling) for behavioral and system integration.
• Experience with Analog Compute, In-Memory Compute techniques, and integration of Non-Volatile Memory (Flash, emerging NVM) technologies.
• Familiarity with AI Accelerator Hardware, accelerator interfaces, and co-optimization of algorithms and circuits for ML workloads.
• Strong programming skills in Python and NumPy for modeling, data analysis, and automation of simulation flows.
• Proven track record of silicon bring-up, lab characterization, and debugging of mixed-signal ASICs or chiplets.
• Excellent communication, cross-functional collaboration, and mentoring skills; ability to influence system decisions and document IP for production.

Benefits

• Fully paid medical, dental, and vision
• Equity
• PTO/Vacation
• 401K
• Flexible work arrangements

- For this position, you must be currently authorized to work in the United States without the need for sponsorship for a non-immigrant visa. CyberCoders will consider for Employment in the City of Los Angeles qualified Applicants with Criminal Histories in a manner consistent with the requirements of the Los Angeles Fair Chance Initiative for Hiring (Ban the Box) Ordinance.This job was first posted by CyberCoders on 06/10/2026 and applications will be accepted on an ongoing basis until the position is filled or closed. Everforth CyberCoders is proud to be an Equal Opportunity Employer

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, age, sexual orientation, gender identity or expression, national origin, ancestry, citizenship, genetic information, registered domestic partner status, marital status, status as a crime victim, disability, protected veteran status, or any other characteristic protected by law. Our hiring process includes AI screening for keywords and minimum qualifications, and a virtual recruiter as part of the application process. A human recruiter reviews all results. Click here for details on our virtual recruiter .  Everforth CyberCoders will consider qualified applicants with criminal histories in a manner consistent with the requirements of applicable state and local law, including but not limited to the Los Angeles County Fair Chance Ordinance, the San Francisco Fair Chance Ordinance, and the California Fair Chance Act. Everforth CyberCoders is committed to working with and providing reasonable accommodation to individuals with physical and mental disabilities. Individuals needing special assistance or an accommodation while seeking employment can contact a member of our Human Resources team at  View email address on ziprecruiter.com to make arrangements.