Physical Design Engineer (PnR / PPA / Timing Closure)

Physical Design Engineer (PnR / PPA / Timing Closure) Job Title: Physical Design Engineer (PnR / PPA / Timing Closure) City: Mountain View | State/Province: California | Posting Start Date: 6/18/26 Wipro Limited (NYSE: WIT, BSE: 507685, NSE: WIPRO) is a leading technology services and consulting company focused on building innovative solutions that address clients’ most complex digital transformation needs. Job Description We are looking for a Physical Design Engineer with strong expertise in Place & Route (PnR), Power-Performance-Area (PPA) optimization, and timing convergence for advanced technology nodes. Key Responsibilities Drive block-level physical design implementation from netlist to GDSII. Perform floorplanning, power planning, placement, clock tree synthesis (CTS), routing, and physical verification. Optimize designs for Power, Performance, and Area (PPA) targets. Achieve timing closure across multiple corners and modes. Analyze and resolve setup, hold, transition, capacitance, and noise violations. Develop and maintain timing constraints (SDC) and STA signoff methodologies. Perform EMIR (Electromigration & IR Drop) analysis and closure. Collaborate with RTL, DFT, STA, and Signoff teams to ensure successful tapeout. Debug physical design issues and drive design convergence within project schedules. Required Skills Strong experience in Physical Design and PnR flow. Hands‑on expertise in: Floorplanning Placement & Optimization Clock Tree Synthesis (CTS) Routing Timing Closure Static Timing Analysis (STA) Timing Constraints (SDC) EMIR Analysis PPA Optimization Experience with industry‑standard EDA tools such as: Synopsys Fusion Compiler / ICC2 PrimeTime Cadence Innovus (optional) RedHawk / Voltus (EMIR) Good understanding of low‑power design techniques and signoff methodologies. Preferred Qualifications Bachelor's or Master’s degree in Electrical/Electronics Engineering. Experience in advanced nodes (7nm/5nm/3nm preferred). Strong debugging and problem‑solving skills. Experience working with cross‑functional silicon teams. Mandatory Skills VLSI Physical Place and Route. Experience: 3‑5 Years. Compensation & Benefits The expected compensation for this role ranges from $45,000 to $121,000. Final compensation will depend on various factors, including your geographical location, minimum wage obligations, skills, and relevant experience. The role is also eligible for Wipro’s standard benefits, including a full range of medical and dental benefits options, disability insurance, paid time off (inclusive of sick leave), and other paid and unpaid leave options. Applicants are advised that employment in some roles may be conditioned on successful completion of a post‑offer drug screening, subject to applicable state law. Wipro provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws. Applications from veterans and people with disabilities are explicitly welcome. We are an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, caste, creed, religion, gender, marital status, age, ethnic and national origin, gender identity, gender expression, sexual orientation, political orientation, disability status, protected veteran status, or any other characteristic protected by law. Wipro is committed to creating an accessible, supportive, and inclusive workplace. Reasonable accommodation will be provided to all applicants including persons with disabilities, throughout the recruitment and selection process. Accommodations must be communicated in advance of the application, where possible, and will be reviewed on an individual basis. Wipro provides equal opportunities to all and values diversity. © 2026 Wipro Limited #J-18808-Ljbffr Wipro Technologies