Sr. Principal Architect

About Neurophos: We are developing an ultra-high-performance, energy-efficient photonic AI inference system. We’re transforming AI computation with the first-ever metamaterial-based optical processing unit (OPU). As AI adoption accelerates, data centers face significant power and scalability challenges. Traditional solutions are struggling to keep up, leading to rapidly rising energy consumption and costs. We’re solving both problems with an OPU that integrates over one million micron-scale optical processing components on a single chip. This architecture will deliver up to 100 times the energy efficiency of existing solutions while significantly improving large‑scale AI inference performance. We’ve assembled a world‑class team of industry veterans and recently raised a $110M Series A led by Gates Frontier. Participants include M12 (Microsoft’s Venture Fund), Carbon Direct Capital, Aramco Ventures, Bosch Ventures, Tectonic Ventures, Space Capital, and others. We have also been recognized on the EE Times Silicon 100 list for several consecutive years. Join us and shape the future of optical computing! Location: San Francisco Bay Area or Austin, TX. Full‑time onsite position. Position Overview: We are seeking an accomplished technical leader to serve as Senior Principal Architect for our cutting‑edge System‑on‑Chip programs. This senior‑level position requires deep hands‑on technical expertise in SOC and CPU architecture specification development combined with extensive performance, power, and area analysis. The ideal candidate will define architectural direction for complex, large‑scale SOCs and drive rigorous PPA trade‑off studies to deliver optimal silicon solutions. Key Responsibilities: Drive SOC architecture definition including subsystem partitioning, memory hierarchy, interconnect topology, and IP integration strategy Drive CPU architecture specification encompassing microarchitecture, pipeline design, cache hierarchy, and instruction set extensions Partner with modeling teams on performance analysis using cycle‑accurate simulators, trace‑driven models, and analytical frameworks Drive power architecture decisions including voltage/frequency domains, power gating strategies, and dynamic power management Drive area analysis and optimization, balancing performance and power targets against die cost constraints Collaborate in trade‑off studies across the performance/power/area design space to guide architectural choices Work closely with RTL design, physical design, and analog teams to ensure architectural intent is realized in implementation Drive architectural specifications and documentation Represent architecture in program reviews and drive alignment with product requirements Qualifications: MS or PhD in Electrical Engineering, Computer Engineering, or Computer Science 15+ years of experience in SOC/CPU architecture with at least 5 years in a principal or staff‑level role Expert knowledge of CPU microarchitecture including out‑of‑order execution, branch prediction, memory subsystems, and coherency protocols Strong background and experience in performance modeling methodologies and tools Deep understanding of power estimation techniques at architectural and RTL levels Experience with modern SOC building blocks including high‑speed interconnects, memory controllers, and accelerator architectures Track record of successful tape‑outs on advanced process nodes Excellent communication skills with ability to influence across organizational boundaries Excellent problem‑solving skills and attention to detail Preferred Skills: Experience with RISC‑V or ARM architecture development Familiarity with machine learning accelerator architectures Background in silicon bring‑up and performance correlation Understanding of advanced packaging technologies Experience with system‑level power management frameworks What We Offer: A pivotal role in an innovative startup redefining the future of AI hardware. A collaborative and intellectually stimulating work environment. Competitive compensation, including salary and equity options. Good benefits - health, vision, dental, 401 (k), etc. Opportunities for career growth and future team leadership. Access to cutting‑edge technology and state‑of‑the‑art facilities. Opportunity to publish research and contribute to the field of efficient AI inference. This is a rare opportunity to work on a game‑changing technology at the intersection of photonics and AI. As part of our elite team, you’ll contribute to a platform that redefines computational performance and accelerates the future of artificial intelligence. Be a key player in bringing this transformative innovation to the world. #J-18808-Ljbffr Neurophos