ASIC STA Engineer: Timing & IP Integration
Apple Inc.
A leading technology company in Austin is seeking an ASIC STA Engineer to oversee timing closure and collaborate with SOC teams. Candidates should possess a Bachelor's degree and have strong fundamentals in digital design. Proficiency in scripting languages such as TCL, Python, and Perl is preferred. This role offers the chance to work on innovative projects that impact millions of customers daily and contribute to hardware technology transformation. #J-18808-Ljbffr Apple Inc.
Vacancy posted 15 hours ago
Similar jobs that could be interesting for youBased on the ASIC STA Engineer: Timing & IP Integration in Austin, TX vacancy
- ...technology company in Austin, Texas, is looking for an ASIC STA Engineer to spearhead IP development. This role requires leading coordination with multiple SOC teams, executing integration tasks, and developing timing verification methodologies. Candidates should possess...Suggested
- ...Technologies is seeking a highly skilled engineer in Austin, Texas, with extensive experience in ASIC design and electrical engineering fundamentals... ...have strong knowledge of design flows, timing analysis, and industry-standard STA tools. Qualifications include at least 6...Suggested
- A leading technology company in Austin is seeking an ASIC STA Engineer to manage timing constraints throughout the SoC design process. Responsibilities include timing sign-off, developing STA flows, and collaboration with various teams to ensure timing closure. Ideal candidates...Suggested
- ...searching for a hardworking engineer to join our exciting... ...for leading edge IP development and coordinating... ...to execute design and integration tasks for the high quality... .... Description As an ASIC STA Engineer, you will have... ...various aspects of SOC Timing: Full chip and block level...Suggested
- NVIDIA AI in Austin, TX is looking for an ASIC Design Engineer to join its System-On-Chip group. In this role, you will focus on improving methodologies and deliver system-level IP for performance measurement on cutting-edge GPUs and SOCs. The ideal candidate should have...Suggested
- Skyworks Solutions, Inc. is seeking a talented System Design Engineer to join our RMI-Timing Systems Engineering Team in Austin, Texas. The role... ...semiconductor sector, ensuring effective specifications and integration. The ideal candidate will have extensive experience in...
- ...than a B200. With Etched ASICs, you can build products... ...with GPUs, like real-time video generation models... ...and staffed by leading engineers, Etched is redefining the... ...to join our Interface IP DV team. You will work... ...specifications. Collaborate with integration and SoC DV teams to...Work at officeShift work
- Silicon Validation Software Engineer- GPU IP Validation and Integration Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture...
- A leading semiconductor company in Austin is seeking an ASIC Design Verification Engineer to enhance the development of cutting-edge technologies. The... ...architects, manage verification processes, and ensure high-quality IP delivery. Applicants should have a background in...
- Ericsson GmbH in Austin, Texas is seeking a Senior Design Verification Engineer specializing in ASIC IP development. In this position, you will lead verification efforts on cutting-edge 5G technology, building models and testbenches while mentoring team members. The ideal...
- Silicon Laboratories Inc. in Austin, Texas, seeks an experienced verification engineer to join the Modem Verification team. This position entails ensuring the quality and performance of ASIC IP used in IoT applications, contributing significantly to wireless modem...
- SR. ASIC DFT ENGINEER (SILICON ENGINEERING) SpaceX was founded under the belief... ...leveraging Siemens Tessent tools Integration and verification of Design for Test (DFT) IPs and fabrics within subsystems... ...test flows Run and debug non‑timing and SDF annotated gate‑level simulations...Permanent employmentWorldwideWeekend work
$166k - $249k
...Date posted 06/07/2026 Category Engineering Hire Type Employee Job ID 15246 Base... ...lead in chip design, verification, and IP integration, empowering the creation of high-performance... ...: An experienced and highly skilled ASIC Digital Verification Engineer with a...Remote workSynopsys
Austin, TX1 day ago- ...want to utilize your engineering background to make... ...state‑of‑the‑art ASICs. We have an extraordinary... ...the opportunity to integrate and come up with... ...for digital IP designers and/or users... ...optimize design flows and timing / power... ...and debug tools, and STA tools. Knowledge of...
- ...seeking an experienced SoC Physical Design Engineer to lead the physical implementation of... ...create scripts, and conduct deep analysis of timing paths. Ideal candidates will have... ...TCL, alongside a solid understanding of STA methodologies. #J-18808-Ljbffr Apple Inc.
$168k - $264.5k
...Nvidia is hiring a Senior SOC/IP Methodology Engineer to help design and... ...Synthesis to final design closure (timing and layout) involving... ...requirements for QA, smooth integration, and high-quality analysis... ...will also work with external ASIC companies if we decide to outsource...$106.5k - $162k
...receive an alert: Senior Engineer, Physical Design (ASIC/SoC Place & Route) (Austin... ...floorplan, place and route, CTS, STA, and signoff. You will be... ...Route Implement ECOs for timing closure Signal EM/Noise... ...implementation or chip integration and signoff Experience in...Work at office- Description As an ASIC STA Engineer, you will have responsibilities spanning... ...aspects of SoC design in terms of timing. Key responsibilities include... ...development, ownership of IP and block level timing... ...process variations and signal integrity related issues. Hands on experience...
- ...Description As a Cellular ASIC Design Engineer, you'll develop and... ...methodology for integrated circuits across multiple... ...products at the block/IP-level and system-level... ...synthesis, place-and-route, timing closure, and signoff... ...validation and STA vs spice correlation-...
- ...by two former Navy electrical engineers with a proven track record in... ...are seeking a Software Systems-Integration Engineer to connect our platform... ...networking fundamentals (TCP/IP, sockets, real‑world protocol... ...Dental, Vision Insurance Paid Time Off Allen Control Systems is...Local area
$143.15k - $265.85k
Staff Digital Design Engineer - SOC Low Power, Clocking & Integration page is loaded## Staff Digital Design Engineer -... ...controllers, and related infrastructure IPs.* Prepare and hold architecture,... ...), synchronization techniques, and timing considerations.* Extensive...Flexible hoursShift work$116k - $189.75k
...NVIDIA is looking for an ASIC Verification Engineer to help verify our global IP and impact a variety of products across consumer graphics, self-driving cars... ...with design, architecture, verification and integration teams to make implementation choices, craft and implement...NVIDIA Gruppe
Austin, TX3 days ago- Etched.ai, Inc. is looking for a Design Verification Engineer to join our Internal IP DV team in Austin, Texas. In this role, you will ensure the robustness and high performance of custom IPs by developing UVM/SystemVerilog testbenches and executing verification plans....Work at office
- ...latency than a B200. With Etched ASICs, you can build products that... ...with GPUs, like real-time video generation models and extremely... ...investors and staffed by leading engineers, Etched is redefining the... ...Engineer to join our Internal IP DV team. You will ensure the custom...Work at officeShift workNight shift
$116k - $189.75k
...NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus... ...and delivering system-level IP to measure performance across multiple... ...characteristic protected by law.* Be an integral part of the team defining, developing,...- ## ASIC Design Verification EngineerAustin,Texas,United StatesFind... ...opportunity:****ASIC Design Verification Engineer** **Austin, Texas****This is... ....At Ericsson, the ASICs our IP teams build are the backbone of... ...’s Stock Purchase Plan.**Your Time** Your work-life balance is...Temporary workWorldwide
$85k - $105k
...commercial Electronic Security Systems Field Engineer to join our federal team. This is a... ...the ability to travel up to 75% of the time. Based in the Huntsville, AL or Washington... ...projects including: system programming, integration, installation coordination, system and...For subcontractorWork at officeLocal areaRemote workWorldwideJohnson Controls Federal Systems
Austin, TX4 days ago- ...visit What We Do Job Summary The Senior IP Telephony Engineer is responsible for the engineering,... ...AudioCodes), dial plans, and carrier integrations. Lead or materially contribute to migration... ...contact center telephony routing, time-of-day/holiday changes, and call delivery...Local areaRemote work
First American Financial Company
Austin, TX4 days ago - Ericsson GmbH in Austin, TX is seeking a Senior Design Verification Engineer to lead verification efforts for ASICs in 5G infrastructure. The role involves building transaction-level models, designing UVM testbenches, and driving hardware emulation. Candidates should have...
$200k
...Efficient is seeking a Lead STA Engineer to join our growing team. The Timing Lead will work on timing... ...functional and we are a integrated highly interdisciplinary... ...timing convergence of IP, Subsystem and SOC blocks... ...Knowledge of physical design and ASIC implementation *...Full time
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to ASIC STA Engineer: Timing & IP Integration. Be the first to apply!
