RTL Design Engineer
$123.1k - $196.9kTeradyne Inc
We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world!
We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive. Our Purpose TERADYNE, where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought and in our workforce. Our employees are supported to innovate and learn something new every day. We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and experiences. We believe that our differences enable us to be a better team - one that makes better decisions, drives innovation and delivers better business results. Opportunity Overview Teradyne's Silicon Technology Engineering (STE), Digital ASIC Group is responsible for developing advanced node ASICs for Teradyne next generation products such as SOC and Memory Test Instruments. Teradyne's products in many ways must be ahead of the semiconductor industry in order for our customers to ship production chips/products. You will join a best-in-class Digital team as a RTL Designer working in collaboration with an Analog team and product architects to develop Teradyne's next generation large Mixed Signal ASICs. You will be involved in all phases of development including specification, architecture, design, verification, physical design, and silicon bringup, and will have cutting-edge AI tools available to optimize your productivity. Responsibilities:- Developing specifications, micro-architecture, and RTL design of mission critical blocks in collaboration with the chip architect
- Integration of industry standard and Teradyne custom IPs
- Collaborating with the verification team on test plans, debug support and coverage closure to ensure high quality RTL and first pass silicon success
- Providing timing constraints and STA support to the Physical Design team through timing closure
- Providing post silicon lab bringup and debug support
- BSEE or MSEE in Electrical Engineering or related field with 5+ years of experience.
- Extensive logic design experience writing RTL in Verilog
- Design of state machines, FIFOs, high speed data paths and arbitration logic and DFT
- Experience with logic synthesis and timing constraints
- Experience with clock domain crossings (CDC) and static timing analysis (STA)
- Experience with high speed memory and serial
- Experience with automation through scripting such as Python, Tcl & Make
- Teradyne is seeking an RTL Designer for its Silicon Technology Engineering team in North Reading, MA. This role involves developing advanced node ASICs and working collaboratively with an Analog team to ensure high-quality RTL designs. Candidates should have a BSEE or MSEE...Suggested
$116.96k - $160.82k
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