Space-Qualified ASIC Design Engineer - DFT & Physical
Jobleads-US
The Boeing Company in Mountain View, CA is seeking ASIC Design Engineers focused on Design-for-Test (DFT) and Physical Design (Synthesis and Timing). You will advance space and aerospace digital subsystems and collaborate across RTL, verification, and backend teams.
Responsibilities include designing DFT architectures (TAP/JTAG, IJTAG), memory BIST, and timing closure, plus silicon debug and tapeout readiness. Onsite role with travel as needed.
#J-18808-Ljbffr Jobleads-USVacancy posted 1 day ago
Similar jobs that could be interesting for youBased on the Space-Qualified ASIC Design Engineer - DFT & Physical in Mountain View, CA vacancy
$119.85k - $162.15k
...Find your future with us. Boeing Defense, Space and Security is hiring ASIC Design Engineers — Design-for-Test (DFT) & Physical Design (Synthesis and Timing) at various... ...Background in radiation‑hardened or space‑qualified ASIC design. FPGA implementation experience...SuggestedPermanent employmentWork experience placementInterim roleRelocationVisa sponsorshipWork visaFlexible hoursShift workDay shift$119.85k - $239.2k
ASIC Design Engineers — Design-for-Test (DFT) & Physical Design (Synthesis and Timing) – (Experienced, Lead, or Senior) Company... ...Boeing Company Boeing Defense, Space and Security is hiring ASIC... ...in radiation‑hardened or space‑qualified ASIC design. FPGA...SuggestedPermanent employmentFull timeWork experience placementInterim roleRelocationVisa sponsorshipWork visaFlexible hoursShift workDay shift$125.7k - $203.1k
...product development—from design to qualification to... .... Your Impact As a Physical Design Engineer, you will play a key... ...Collaborate with RTL, DFT, EDA vendors, and tool... ...of work experience. Qualifying education and work... ...experience should be in ASIC Physical Design, ASIC...SuggestedFull timeTemporary workWork experience placementInternshipLocal areaFlexible hoursCISCO Systems
San Jose, CA2 days ago$249.24k - $348.93k
...and working in space for the benefit... ...communications network designed to deliver... ...FPGAs, digital ASICs, and/or mixed-... ..., and product engineering Support lab... ...Experience with physical design flows... ...Experience with DFT/Scan/MBIST/LBIST... ...developing a highly qualified and dedicated...SuggestedPermanent employmentFull timeTemporary workLocal areaRemote workWorldwide- ...Cisco’s Silicon One team is seeking a Physical Design Engineer to lead RTL-to-GDSII implementation for... ...flows while collaborating across RTL, DFT, and EDA teams to secure high-performance... ...silicon. The role requires expertise in ASIC physical design concepts, floor...Suggested
$141.91k - $269.1k
...portfolio, a world-class design ecosystem, and an... ...Government (ADG) - The Senior DFT Logic Design Engineer provides technical... ....Drive quality of ASIC DFT/DFM and ATPG... ...Experience in working with physical designers on DFT/DFM... ...Statement:All qualified applicants will receive...Full timeInternshipLocal areaImmediate startShift workIntel
Santa Clara, CA21 hours ago$180k - $260k
...Need: We are looking for a Principal Physical Design Engineer to serve as an early member of our... ...appropriate. ~ Work closely with DFT, verification, package, SI/PI, and other... ...Qualifications: ~10+ years of ASIC or SoC physical design experience with...Entrada Ventures
Palo Alto, CA2 days ago- ...protected characteristic. Position Physical Design Engineer Location: Palo Alto, CA (Onsite... ...RTL & Micro?architecture teams DFT & Test engineers Foundry and CAD teams... ...automation (scripts/flows) Notes All qualified applicants will receive consideration...Permanent employmentLocal area
Danta Technologies
Palo Alto, CA1 day ago $230k - $400k
...About The Role Own floorplan‑to‑signoff physical design for one or more blocks of our AI... .../ IR / EM signoff, signal integrity, or DFT‑aware physical design. Compensation... ...Visa Sponsorship DensityAI sponsors qualified candidates for H‑1B, O‑1, TN, E‑3, and other...Permanent employmentH1bVisa sponsorshipWork visaDensityAI
Mountain View, CA2 days ago- ...Job Title Physical Design Engineer Location Sunnyvale, CA OR Austin, TX Duration Long term... ...and/or top level for high-performance ASICs, SoCs, and custom silicon chips with... ...physical and electrical verification. DFT Integration: Work with Design for Test...
I-Flow
Sunnyvale, CA2 days ago $138k - $197k
...custom, high performance ASIC’s and SoC’s, from design through manufacturing, packaging... ..., and reliability using physical design and circuit... ...Bachelor's degree in Electrical Engineering, Computer Engineering,... ...optimizations in physical design spaces.Experience with advanced...WorldwideGoogle
Sunnyvale, CA4 days ago$138k - $197k
...Share Physical Design Engineer, 3D Technology corporate_fare Google place Sunnyvale, CA, USA ~... ...and optimizations in physical design spaces. Experience with advanced FinFET and... ...Moore’s Law while delivering cutting edge ASIC’s and SoC’s. You will help develop new...Worldwide$130k - $155k
...of enabling human life on Mars. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we'... ...next-generation ASICs for deployment in space and ground infrastructures around the... ...physical design Basic knowledge of DFT/Scan/MBIST/LBIST and understanding of...Permanent employmentTemporary workWorldwideWeekend work- ...Delos Data Inc, a California startup, seeks a Principal Physical Design Engineer to shape challenging physical implementation and drive performance, power, area, and schedule targets. You will own complex blocks from floorplan through signoff and lead a hands-on PD team...
- ...Description Avicena is seeking a talented and detail-oriented ASIC Design Verification (DV) Engineer to join our chip design team. Job Title ASIC... ...for basic design understanding. Exposure to physical layer (PHY) or mixed-signal verification concepts. #J...
Avicena Tech
Sunnyvale, CA1 day ago $106.4k - $172.15k
...Job Summary Your Career As a Design Verification engineer on the ASIC team, you will ensure that the ASICs... ...reasonable accommodations for all qualified individuals with a disability. If you... ...medical condition, national origin, physical or mental disability, political affiliation...Full timeCasual workWork at officePalo Alto Networks
Santa Clara, CA1 day ago- ...We are looking for a Physical Design Engineer with strong expertise in Place & Route (PnR), Power-Performance-Area (PPA) optimization, and timing... ...Electromigration & IR Drop) analysis and closure. Collaborate with RTL, DFT, STA, and Signoff teams to ensure successful tapeout....
Proxelera PVT LTD
Mountain View, CA1 day ago - ...Technologies group, you’ll help design and manufacture our next-... ...a mix of strategic engineering along with hands-on experience in physical design and large chip integration... ...ability in all aspects of ASIC implementation including Synthesis, DFT insertion, Floorplanning, Clock...Temporary work
Apple
Santa Clara, CA2 days ago - ## Physical Design Engineer II (IC)Applylocations: US-CA-San Jose, Californiatime type: Full timeposted... ...PNR, and STA for assigned partitions of ASIC chip adhering to strict schedules and... ...closely with architects, RTL designers, and DFT engineers to resolve implementation and...Hourly payFull timeWork experience placement
Arrow ECS
San Jose, CA3 days ago - ...Physical Design Engineer - Location: San Jose OR Irvine, CA Our client develops specialized semiconductor... ...are seeking an experienced Senior SoC/ASIC Physical Design Engineer to take the... ...across teams: Partner closely with RTL, DFT, and ASIC design groups to validate architectural...Full timeH1bVisa sponsorshipRelocation package
Gyga Force Co
San Jose, CA4 days ago - ...Physical Design Engineer On-site | Mountain View, CA $250 + base + equity I’m working with an AI compute startup rebuilding the hardware... ...IR-drop, electromigration, or signal-integrity sign-off DFT-aware physical design Experience with AI accelerators, CPUs...
Acceler8 Talent
Mountain View, CA2 days ago $143.8k - $230k
...Job Description The ASIC Products Division at Broadcom has developed some of... ...2.5D interconnects. We are seeking a design engineer with physical layout skills to develop our next generation... ...employer. We will consider qualified applicants without regard to race, color...Work experience placementLocal areaWorldwideBroadcom Corporation
San Jose, CA4 days ago$150k - $170k
...Arrow Company) Semiconductor and Engineering Talent Acquisition Professional !!! Position: Sr. Physical Design Engineer (eInfochips Inc)... ...minimum of 8 years of experience in ASIC or a related field, or a... ...cross-functionally with RTL, STA, DFT, verification, and packaging...Full timeTemporary workWork at officeEinfochips
San Jose, CA4 days ago$133.2k - $192.83k
## Physical Design EngineerApplylocations: San Jose, California, United... ...seeking a **Physical Design Engineer** to join our Silicon Engineering... ...with architecture, RTL, DFT, synthesis, verification, and... ...**Posting Statement:**All qualified applicants will receive consideration...Local areaShift workAltera
San Jose, CA2 days ago$230k - $280k
...About The Role As a member of our tight knit physical design team, you will be working on the design and analysis of 3D integrated products. This role involves a combination of traditional ASIC/SoC physical design skills, packaging, power, clock and cooling analysis...Foundation Capital
Sunnyvale, CA2 days ago- ...interconnects to scalable photonic engines, Lumilens is unlocking... ...line of code, every design decision, every... ...are seeking a Senior Physical Design Engineer to join... ...developing high‑performance ASIC using TSMC advance... ...opportunity employer. All qualified applicants will receive...
Lumilens
San Jose, CA2 days ago - ...lead and contribute to advanced-node physical design for complex ASIC and SoC products, driving... ...RTL, CAD, technology, and product engineering teams, you will help deliver high-quality... ...We encourage applications from all qualified candidates and will accommodate applicants...
Advanced Micro Devices , Inc.
Santa Clara, CA1 day ago $109.7k - $175.5k
...Description:Broadcom's ASIC Product Division (... ...candidates for a DFT position. The... ...activities for APD's designs - DFT Architecture... ...working with the Physical Design & STA team... ...closely with STA and DI Engineers design closure for... ...We will consider qualified applicants without...Full timeLocal areaBroadcom
San Jose, CA20 hours ago$100k
...seniorities. Tenstorrent is looking for a Physical Design CPU Methodology Engineer who defines and drives the... ...Physical Design Engineer with 10+ years of ASIC/SoC/CPU experience, ideally focused... ...with architecture, RTL, circuit, DFT, CAD, program, data, and EDA vendor...Full timeRemote workTenstorrent
Santa Clara, CA15 days ago$300k - $400k
...Staff ASIC Engineer (Physical Design OR STA)Total package up to $400k (Base up to $200k + bonus + stock)Total first year realistic income $350-400... ...design, microarchitecture, or front-end flowsKnowledge of DFT (scan, MBIST, repair)BenefitsHealth, dental, and vision insuranceLife...CyberCoders
San Jose, CA21 hours ago
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to Space-Qualified ASIC Design Engineer - DFT & Physical. Be the first to apply!
Related searches
- senior software design engineer Mountain View, CA
- product design engineer Mountain View, CA
- senior manager product engineering Mountain View, CA
- senior product design engineer Mountain View, CA
- senior design verification engineer Mountain View, CA
- sr. product engineer Mountain View, CA
- new product engineer Mountain View, CA
- design engineer Mountain View, CA
- data center design engineer Mountain View, CA
- physical design engineer Mountain View, CA