Staff Physical Design Engineer: 5nm Tapeout & AI-Driven
Synopsys Inc
Synopsys Inc. is seeking a senior ASIC/physical design engineer to help customers achieve tapeout-ready implementations. You will work on RTL-to-GDS flows, using Fusion Compiler and related tools, across advanced nodes and high-performance applications. You will provide technical guidance, automate tasks with TCL/Python, and collaborate with R&D to address real customer issues, ensuring quality and timely design closures. #J-18808-Ljbffr Synopsys Inc
Vacancy posted 4 days ago
Similar jobs that could be interesting for youBased on the Staff Physical Design Engineer: 5nm Tapeout & AI-Driven in Sunnyvale, CA vacancy
$250.6k - $362.6k
...platforms central to the AI era, powering Cisco... ...development—from design to qualification to... ...with physical design teams to identify... ...QualificationsBachelor’s degree in Engineering and 15+ years of... ...machine learning driven placement and... ...design tapeouts in 7nnm/5nm/3nm or below...SuggestedFull timeTemporary workLocal areaFlexible hoursCISCO Systems
San Jose, CA6 days ago- ...the leader in engineering solutions from... ...rapidly innovate AI-powered products... ...silicon design, IP, simulation... ...advanced-node physical design, where a... ...and solve before tapeout. The difference... ...node designs at 5nm, 3nm, and below... ...machine learning-driven design optimization...Suggested
Synopsys, Inc.
Sunnyvale, CA5 days ago - ...discovery to powering AI and the... ...future. Whether you’re designing next-gen processors... ...to advanced-node physical design for complex... ...technology, and product engineering teams, you will... ..., and data-driven design solutions that... ...verification, and tapeout preparation activities...Suggested
AMD
Santa Clara, CA6 days ago $168k - $264.5k
...are now looking for a Senior Physical Design Engineer. NVIDIA has continuously... ...deep learning ignited modern AI — the next era of computing.... ...physical design implementation on 5nm, 4nm and 3nm technology.Your... ..., place/ route and tapeout solutions.To be successful you...SuggestedFull timeNvidia
Santa Clara, CA6 days ago$138k - $197k
...s and SoC’s, from design through manufacturing... ...reliability using physical design and circuit... ...in Electrical Engineering, Computer Engineering... ...the future of AI/ML hardware acceleration... ...within AI/ML-driven systems.As a Physical... ...to maturity and tapeout. This will include...SuggestedWorldwideGoogle
Sunnyvale, CA4 days ago$100k
...the industry on cutting-edge AI technology, revolutionizing... ...is seeking a highly skilled Physical Design Engineer to drive the critical Die-to... ...controllers from netlist to tapeout.Own the full PD flow (RTL-to... ...handoff (LEF/LIB) and constraint-driven interface design.How to...Permanent employmentRemote workTenstorrent
Santa Clara, CA5 days ago- ...discovery to powering AI and the technologies people... ...to advanced-node physical design for complex ASIC and SoC... ..., and product engineering teams, you will help deliver... ...automation, and data-driven design solutions that... ...physical verification, and tapeout preparation activities...
AMD
Santa Clara, CA1 day ago $200k - $220k
...Staff / Senior Staff Physical Design Engineer Bolt Graphics is a semiconductor startup based in Sunnyvale, CA building the fastest and most efficient graphics... ...withhigh-speed interfaces or complex SoCs (CPU/GPU/AI) Exposure toGLS and timing-related silicon debug...Work at officeBolt Graphics
Sunnyvale, CA3 days ago$142k
...Details: Job Description: The Role and Impact: Intel is seeking motivated individuals to join its dynamic design engineering team as an AI-Driven Physical Design Engineering PhD Intern. This role offers a unique opportunity to leverage artificial intelligence and...InternshipLocal areaImmediate startShift workIntel
Santa Clara, CA4 days ago- Synopsys, Inc. seeks an experienced ASIC physical design engineer to drive timing closure for advanced-node designs and lead signoff readiness across block, subsystem, and full-chip implementations. You will build repeatable design flows using TCL, Python, and Perl, and...
- Synopsys, Inc. is seeking an experienced ASIC physical design engineer in Sunnyvale, CA. You will drive timing closure, signoff readiness, and PPA optimization for advanced-node customer designs across block, subsystem, and chip levels. You will develop methodologies and...
$180k - $280k
...builds the world's largest AI chip, 56 times larger than GPUs... ...The RoleJoin our close-knit physical design team where you will drive... ...implementation from RTL to tapeout, ensuring your blocks integrate... ....BS or MS in Electrical Engineering.Preferred:Knowledge of high...Cerebras Systems
Sunnyvale, CA6 days ago$138k - $206k
...whose innovative designs are pushing the boundaries... ...and growth are driven by an inclusive... ...demands of future AI/ML workloads. Our... ...hardware and software engineers to identify and... ...You’ll DoOwn the physical implementation of... ...LVS, antenna) and tapeout on advanced FinFET...Work at officeFlexible hoursNight shiftSamsung Semiconductor
San Jose, CA5 days ago$100k
...is leading the industry on cutting-edge AI technology, revolutionizing performance... ...of all seniorities.As a Senior Chiplet Physical Design Engineer at Tenstorrent, you will work on a high... ..., multi-stakeholder projects.Detail-driven, with a strong sense of ownership from...Permanent employmentTenstorrent
Santa Clara, CA6 days ago$100k
...leading the industry on cutting-edge AI technology, revolutionizing performance... ...seniorities.Tenstorrent is seeking talented Physical Design Engineers to implement high-performance... ...implementation flow from synthesis to tapeout, working alongside world-class engineers...Permanent employmentTenstorrent
Santa Clara, CA2 days ago$100k
...is leading the industry on cutting-edge AI technology, revolutionizing performance... ....Tenstorrent is seeking a talented Physical Design Engineer to implement high-performance blocks for... ...implementation flow from synthesis to tapeout, working alongside world-class engineers...Permanent employmentTenstorrent
Santa Clara, CA5 days ago$136k - $218.5k
...tapping into the unlimited potential of AI to define the next era of computing.... ...now looking for a motivated Senior Physical Design and Timing Engineer to join our dynamic and growing team.... ...blocks, IPs, or chips from RTL/netlist to tapeout through logic synthesis,...Full timeNvidia
Santa Clara, CA3 days ago$100k
...leading the industry on cutting-edge AI technology, revolutionizing... ...seniorities.Tenstorrent is looking for a Physical Design CPU Methodology Engineer who defines and drives the implementation... ...and determine where data-driven optimization delivers measurable value...Permanent employmentRemote workTenstorrent
Santa Clara, CA3 days ago$2,000 per month
...intelligence. We co-design chips, racks,... ...by leading engineers, Etched is redefining... ...category of AI hardware:... ...timing analysis, physical verification, and... ...timing signoff for tapeout. Own end-to-... ...process nodes (5nm and below) ~... ...our technical staff to contribute...Work at officeRelocation packageThe Consensus
San Jose, CA2 days ago$160k - $275k
...mission is to make the world’s best AI models run as efficiently as allowed by physics, bringing the world years ahead... ...is seeking silicon physical design engineers to join our team as we create best... ...including design freeze and tapeout Work closely with the Design,...Daily paidFull timeWork experience placementLocal areaRemote workMonday to FridayFlexible hoursMatX Inc.
Mountain View, CA2 days ago- ...powers tomorrow’s AI supercomputing. From... ...scalable photonic engines, Lumilens is unlocking... ...of code, every design decision, every breakthrough... ...seeking a Senior Physical Design Engineer to... ...nodes, including 5nm and 3nm. In this... ...Tape out: Perform tapeout signoff activities,...
Lumilens
San Jose, CA2 days ago - ...is the leader in engineering solutions from silicon... ...rapidly innovate AI-powered products.... ...-leading silicon design, IP, simulation and... ...the trenches of physical design, where the... ...that make the next tapeout smoother than the... ...machine learning-driven design optimization...
Synopsys, Inc.
Sunnyvale, CA5 days ago $100k
...is leading the industry on cutting-edge AI technology, revolutionizing performance... ...seniorities.Tenstorrent is seeking an Physical Design Engineer to lead cross-functional efforts to solve... ...architect, integrate, and deploy AI/ML-driven solutions into production physical...Permanent employmentTenstorrent
Santa Clara, CA3 days ago$237k - $296k
...are seeking a highly skilled Physical Design Engineer specializing in Power... ...performance, leading to a successful tapeout and production silicon.... ...micron process nodes (e.g., 5nm, 3nm, and below). Analyze the... ...in high-performance designs (AI) where dynamic power is a...Full timeContract workTemporary workPart timeLocal areaShift work- MatX Inc. in Mountain View, CA, is seeking silicon physical design engineers to develop high-performance, power-efficient silicon for GenAI. You will own subsystems and drive PD from RTL to tapeout, ensuring scalable, correct implementations. The role requires BS in Electrical...
$220k - $270k
...is leading the revolution in AI data center infrastructure, enabling... ...s first 3D-stacked photonics engine, Passage™, capable of... ...About This Role We are hiring a Physical Design Timing Engineer to help drive... ...route, timing closure, and tapeout signoff. Responsibilities Drive...Full timeFlexible hours- Normal Computing is seeking a seasoned Physical Design Engineer to own end-to-end silicon realization at Mountain View, CA. You will drive floorplanning... ...ensure feasibility. You will manage signoff, DRC/LVS, and tapeout readiness, delivering tapeout-proven execution across...
$136k - $218.5k
...tapping into the unlimited potential of AI to define the next era of computing.... ...is looking for best-in-class ML/AI Physical Design Methodology Engineer to join our outstanding Networking Silicon... ..., integrate, and deploy AI/ML-driven solutions into production physical design...Full timeNvidia
Santa Clara, CA4 days ago$136k - $218.5k
...CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect... ...:Master’s Degree in Electrical Engineering, Computer Engineering or Computer... ...an existing vacancy. NVIDIA uses AI tools in its recruiting processes...Full timeNvidia
Santa Clara, CA3 days ago$213k - $287.5k
Annapurna Labs designs silicon and software that accelerates... ...looking for an ASIC Physical Design Engineer to help us trail-... ..., PV signoff and tapeout- Collaborate with FE... ...verification in advanced nodes [5nm or below]- Knowledge... ..., supervisors, and staff; adhere to standards...Local areaFlexible hoursAmazon
Cupertino, CA5 days ago
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to Staff Physical Design Engineer: 5nm Tapeout & AI-Driven. Be the first to apply!
Related searches
- staff security engineer Sunnyvale, CA
- staff engineer Sunnyvale, CA
- assistant electrical engineer Sunnyvale, CA
- senior staff systems engineer Sunnyvale, CA
- engineering aide Sunnyvale, CA
- senior staff engineer Sunnyvale, CA
- staff data engineer Sunnyvale, CA
- technology administrator Sunnyvale, CA
- software engineer staff Sunnyvale, CA
- assistant engineer Sunnyvale, CA