AI-Driven ASIC Physical Design Principal Engineer
$250.6k - $362.6kCisco Systems
The application window is expected to close on: 09/30/2026Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.Meet the TeamThe Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms—like Silicon One—are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.Your ImpactCollaborate with physical design teams to identify high-value automation targets: timing triage, Congestion root-cause analysis, floorplan suggestions.Evaluate and benchmark LLM-generated outputs against ground truth for Design QoR, timing impact, and sign-off compliance.Own the full developer loop: prototype eval production — with a focus on measurable design cycle reduction.Build agentic PnR workflows where Claude iterates autonomously on placement, routing, and timing constraints based on tool feedback loops.Create RAG pipelines that index internal PDKs, design rule documents, sign-off checklists, and runbooks for Claude to reference.Write and maintain Tcl bridge scripts that translate Claude's suggested fixes into executable EDA tool commands.Develop prompt architectures that accurately interpret STA timing reports, DRC logs, congestion maps, and power analysis outputs.Minimum QualificationsBachelor’s degree in Engineering and 15+ years of ASIC related experience, Master’s degree in Engineering and 12+ years of ASIC related experience, or PhD in Engineering and 7+ years of ASIC related experience.Experience with Python and effectively leveraging AI tools through accurate prompting to enhance productivity.Experience designing and building an MCP-based wrapper layer connecting Claude to live EDA tools (Innovus, ICC2, Calibre) for real-time copilot interactions.Experience developing EDA copilots or AI-assisted design tools, along with experience in Docker and containerized EDA environments.Experience with machine learning driven placement and routing (MLPD / ML-driven PnR), and OpenAI APIs (e.g., GPT-4o, o3) and vector databases such as Pinecone or WeaviatePreferred QualificationsExperience with RTL2GDSII flow and design tapeouts in 7nnm/5nm/3nm or below process technologies.Experience working with EDA tools like Innovus, Tempus/Primetime, Redhawk/Voltus or Calibre/Pegasus.Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Message to applicants applying to work in the U.S. and/or Canada:The starting salary range posted for this position is $250,600.00 to $362,600.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by CiscoNon-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employeesExempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the nextAdditional paid time away may be requested to deal with critical or emergency issues for family membersOptional 10 paid days per full calendar year to volunteerFor non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:.75% of incentive target for each 1% of revenue attainment up to 50% of quota;1.5% of incentive target for each 1% of attainment between 50% and 75%;1% of incentive target for each 1% of attainment between 75% and 100%; andOnce performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.The applicable full salary ranges for this position, by specific state, are listed below:New York City Metro Area:$250,600.00 - $416,900.00Non-Metro New York state & Washington state:$241,400.00 - $371,000.00* For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.Job SummaryJob number: 2021186Date posted : 2026-08-24Profession: Product and EngineeringEmployment type: Full time
$136k - $218.5k
...computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine”... ...and intelligence.We are now looking for a motivated Senior ASIC Physical Design Engineer, Netlisting to join our dynamic and growing team. If you want...SuggestedFull timeShift work$136k - $218.5k
...Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect... ...’s Degree in Electrical Engineering, Computer Engineering or... ...a deep understanding of ASIC design flow including... ...vacancy. NVIDIA uses AI tools in its recruiting...SuggestedFull time- ...Physical Design Engineer - Location: San Jose OR Irvine, CA Our client develops... ...processors capable of running AI workloads alongside bandwidth... ...an experienced Senior SoC/ASIC Physical Design Engineer to... ...EDA tool capabilities and ML‑driven optimizations to improve PPA...SuggestedFull timeH1bVisa sponsorshipRelocation package
- ...scientific discovery to powering AI and the technologies... ...to advanced-node physical design for complex ASIC and SoC products, driving... ..., technology, and product engineering teams, you will help deliver... ...methodology, automation, and data-driven design solutions that...Suggested
$100k
...industry on cutting-edge AI technology, revolutionizing... ...Tenstorrent is looking for a Physical Design CPU Methodology Engineer who defines and drives the... ...with 10+ years of ASIC/SoC/CPU experience, ideally... ...and determine where data-driven optimization delivers measurable...SuggestedFull timeRemote work$160k - $275k
...mission is to make the world’s best AI models run as efficiently as allowed by physics, bringing the world years ahead... ...is seeking silicon physical design engineers to join our team as we create best... ...years of industry experience in ASIC Physical DesignGreat...Daily paidFull timeWork experience placementWork at officeLocal areaRemote workMonday to FridayFlexible hours$100k
...the industry on cutting-edge AI technology, revolutionizing... ...is seeking a highly skilled Physical Design Engineer to drive the critical Die-to... ...posting. Who You Are - A seasoned ASIC Physical Design Engineer... ...(LEF/LIB) and constraint-driven interface design. - How to drive...Permanent employmentFull timeRemote work$138k - $206k
...leader whose innovative designs are pushing the... ...and growth are driven by an inclusive culture... ...demands of future AI/ML workloads. Our team... ...and software engineers to identify and address... ...'ll Do Own the physical implementation of memory... ...— for complex ASIC/SoC designs. ~ Proficiency...Work at officeFlexible hoursNight shift$129.2k - $209k
..., and Inclusion. We weave AI into the fabric of everything... ...SummaryYour Career As a Design Verification engineer on the ASIC team, you will ensure that... ...sophisticated coverage-driven, constrained-random methodologies... ..., national origin, physical or mental disability, political...Full timeCasual workWork at office$160k - $220k
...computing. About the Role Join our Physical Design(SoC Integration) team responsible for... ...to GDS. As a Sr. Staff Physical Design Engineer, you will lead physical implementation... ...preferred) ~8+ years of hands-on experience in ASIC physical design with proven tapeout...- ...Execute RTL synthesis for complex ASIC and SoC designs using Cadence Genus.... ...throughout the synthesis and physical design flow. Develop and... ...Bachelor's degree in Electrical Engineering, Computer Engineering, or a... ...supporting complex SoC, AI, HPC, or accelerator designs...
$2,000 per month
...is building the world’s first AI inference system purpose-... ...latency than a B200. With Etched ASICs, you can build products that... ...investors and staffed by leading engineers, Etched is redefining the... ...Etched is looking for exceptional Physical Design engineers to join our team....Work at officeRelocation package- ...that powers tomorrow’s AI supercomputing. From chip... ...to scalable photonic engines, Lumilens is unlocking... ...Every line of code, every design decision, every... ...are seeking a Senior Physical Design Engineer to join... ...developing high‑performance ASIC using TSMC advance process...
$2,500 per month
...frontier intelligence. We co-design chips, racks, software,... ...and staffed by leading engineers, Etched is redefining... ...for exceptional Physical Design engineers to join... ...close blocks, support ASIC infrastructure, automate... ...language Familiarity with AI tools for programming/...Work at officeRelocation package$100k
...Physical Design Engineer Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With... ...hands-on engineer with deep expertise in SOC/ASIC physical design and a track record of...- ...Physical Design Engineer Building AI chips that are hard-coded for individual model architectures. Seeking exceptional PD engineers to join our team... ...Running Physical Design flows to close blocks, support ASIC infrastructure, automate Physical Design flows, improve...
$167.7k - $245.2k
...hardware platforms central to the AI era, powering Cisco's core... ...full product development-from design to qualification to production... ...Impact Set vision and strategy for ASIC verification methodology and... ...work together across the physical and digital worlds. These solutions...Full timeTemporary workLocal areaFlexible hours$165k - $241.4k
...ASIC Design Verification Engineer The Common Hardware Group (CHG) delivers the silicon, optics, and hardware... ...and protect organizations in the AI era – and beyond. We've been innovating... ...technology work together across the physical and digital worlds. These solutions provide...Full timeTemporary workLocal areaWorldwideFlexible hours$90 per hour
...-the-air servicing and AI-backed applications.... ...Leading-Edge Autonomy and Physical AI Networking Chips ~... ...are looking for talented engineers and leaders who have an... ...to drive cutting edge designs from concept to silicon... ...of mobility. Senior ASIC Design Verification...Flexible hours$150k - $220k
...will fundamentally change the design, economics, manufacturing... ...We are seeking a Senior ASIC Design Engineer to join our processor subsystem... ...subsystem in coordination with the physical design team · Participate... ...artificial intelligence (AI) tools to support parts of...Full timeWork at officeImmediate startVisa sponsorshipNight shift- ...generation computing experiences—from AI and data centers, to PCs, gaming... ...ROLE: You will contribute to the ASIC (chip) design for high-performance network... ...with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success...
- ...next-generation computing experiences—from AI and data centers, to PCs, gaming and... ...career. THE ROLE: AMD is looking for an ASIC Design STA engineer to contribute to the development of large SoCs, featuring multiple physical blocks and over 300 clock domains. The candidate...
$136k - $218.5k
...group is looking for a top-notch ASIC engineer to join the team. The Team is... ...collaborates with the front design team to understand the... ...back end team to help craft the physical floorplan of the chip. The team... ...deep learning ignited modern AI — the next era of computing....Full timeWork experience placement$100k
...is leading the industry on cutting-edge AI technology, revolutionizing performance... ...all seniorities. As a Senior Chiplet Physical Design Engineer at Tenstorrent, you will work on a high... ..., multi-stakeholder projects. - Detail-driven, with a strong sense of ownership from...Full timeRemote work$155k - $222.6k
...provides a unique experience for ASIC engineers by combining the resources... ...tasks.Your ImpactAs an ASIC Design Engineer on the STA team, you... ...while working alongside the Physical Design team.Develop methodologies... ...protect organizations in the AI era - and beyond. We’ve been...Full timeTemporary workLocal areaFlexible hours- ...experiences—from AI and data centers,... ..., with a focus on ASIC, SoC, FPGA, Adaptive... ...business objectives, and engineering capabilities into... ..., and data-driven product planning rather... ...architecture, design, product engineering... ..., mental or physical disability, national...
- ...discovery to powering AI and the technologies people... .... Whether you’re designing next-gen processors, enabling... ...EDA tools, and AI-driven automation in... ...System Verilog.Support physical design activities, including... ...teams across multiple engineering disciplines and...
$300k - $400k
...Staff ASIC Engineer (Physical Design OR STA)Total package up to $400k (Base up to $200k + bonus + stock)Total first year realistic income $350-400k.... ...design or STA, and a passion for working on bleeding-edge AI and high-performance silicon? Do you enjoy diving into complex...$176k - $298k
...faster than ever.As aPrincipalDesign Engineer in the NVE Design EngineeringCoregroup at Micron Technology... ...for circuit design, including AI/LLM-assisted flows that support: 1. Environment... ...in semiconductor and device physics and analog/mixed-signal circuit design...Full timeLocal areaImmediate start$214.1k - $309.8k
...solutions for data centers by designing some of the most complex chips... ...in the world!Your Impact:As an ASIC Design Verification Leader,... ...formal/Jasper Gold)Experience with AI agents (i.e Cursor, Codex,... ...technology work together across the physical and digital worlds. These...Full timeTemporary workLocal areaFlexible hours
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