Senior AMS Verification Engineer

divh2Senior AMS Verification Engineer/h2pAnalog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures todays innovators stay Ahead of Whats Possible./ppThe ATE Group is currently seeking a motivated Senior AMS Verification Engineer for the IC development of new products. Products in this strategy are comprised of integrated high speed and precision signal chains targeted towards Automated Test Equipment (ATE) applications. Product designs utilize both advanced internal BiCMOS SiGe processes as well as standard 0.18um/16nm CMOS processes. These designs are then combined on a laminate package to provide a custom SIP (System In a Package) solution otherwise known as a chiplet./ppThe candidates responsibilities will include system level verification of the products including simulation of digital and mixed signal circuits including high speed drivers and receivers, DACs, SPI/JTAG/SerDes interfaces, calibration routines and digital controls. This is a multi-die verification effort utilizing both Verilog and spice simulators. A Verification plan will be created at the product start determining the verification methods to be utilized and the block model plans. Duties also include working with evaluation engineers to compare and contrast simulation and lab results. The ideal candidate is a self-motivated individual and fast learner with strong technical, analytical and communication skills. The candidate will have the opportunity to learn system level design experience, work with newly developed internal BiCMOS processes and collaborate closely with an experienced development team./ppJob responsibilities will include, but are not limited to, the following:/pulliDevelop test bench environments and directed functional, random, and constrained random tests. Implement coverage driven verification methodologies. Create functional coverage metrics. Ensure these environments allow verification, design, product, and test engineers to efficiently develop functional test cases./liliDefine and develop block level modeling and verification strategies based on design requirements and architecture/liliSpecify, and perform as necessary, block and chip level RTL, gate, and mixed signal co-simulation regressions. Track progress against verification plan/liliWork with designers and product/apps engineers to achieve functional coverage goals and to debug the design and environment/liliWork closely with evaluation engineers when silicon arrives to compare and contrast simulation results/liliParticipate in project meetings/li/ulpQualifications:/pulliMinimum requirement of BSEE, MSEE and 3+ years experience preferred/liliKnowledge of System Verilog, UVM and OOP/liliKnowledge of Verilog and Spice simulators/liliKnowledge of Analog circuits and CAD tools (Cadence Virtuoso)./liliKnowledge of a scripting language such as Python, TCL, Perl, Bash./liliAbility to problem solve at the circuit and system level/liliGood presentation and writing/communication skills./liliAbility to collaborate in a team environment and across organizations/li/ulpAnalog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group./ppEEO is the Law: Notice of Applicant Rights Under the Law./ppJob Req Type: Experienced Required Travel: Yes, 10% of the time Shift Type: 1st Shift/Days The expected wage range for a new hire into this position is $110,385 to $151,808./pulliActual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors./liliThis position qualifies for a discretionary performance-based bonus which is based on personal and company factors./liliThis position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits./li/ul/div