GPU Physical Design Clocking Engineer
$184.7k - $324.8kApple
Role Number: 200646346Team: HardwareLocation: Austin; Santa ClaraPosted: 2026-02-13SummaryDo you love building elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC)! You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, we will enable our customers to do all the things they love with their devices. This role requires a mix of strategic engineering along with hands-on, technical work. You will be implementing complete chip design from netlist to tapeout. You will have hands on experience in physical design and large chip integration.DescriptionAs a GPU Clocking engineer, you will collaborate with FE teams to understand chip architecture and drive clocking aspects early in design cycle. You will drive best in class clocking construction and solutions for performance, power and Area (PPA). You will collaborate to drive clocking methodologies and “best known methods” to streamline PD work, come up with guidelines and checklists, drive execution, and supervise progress. You will need to communicate and drive the needs of PD and Clocking with multi-functional teams that will enable achieving the goals of the back-end design for the project.Minimum QualificationsBS + 10 years of relevant experienceExperience with ASIC integration including one or more of the following: Floorplanning, Clock and Power distribution, global signal planning, and I/O planning.Experience with Floorplanning tools, P&R flows, and global timing verification Flows is required.Preferred QualificationsExperience with hierarchical design approach, top-down design, budgeting, timing and physical convergence.Experience planning, implementing, and analyzing high-speed clock distribution networks from the root to leaf.Exposure to different strategies for clock distribution including balanced trees, mesh, and forwarded clocks.Ability to use critical clock metrics revolving around latency, skew, and variation to prevent and solve sophisticated cross-hierarchy clocking issues.Experience planning and crafting test structures to evaluate clocking functionality and performance post Silicon. Background in engaging with Test teams pre/post Silicon to debug and analyze problems from a clocking perspective.Experience integrating IP from both internal and external vendors and be able to specify and drive IP requirements in the physical domain.Experience with Physical Design topics: multiple voltage and clock domains, ESD solutions, and mixed signal block integration.Experience with large subsystem designs (>20M gates) with frequencies in excess of 1GHz applying brand new technologies.Familiar with various process related design issues including Design for Yield and Manufacturability, multi Vt strategies and thermal Mgt.Proven track record in solving complex PD and cross functional problems, driving results directly and or directing a team of engineers to innovate and execute on world class designs.Understanding of GPU architecture and design units.Pay & BenefitsAt Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $184,700 and $324,800, and your base pay will depend on your skills, qualifications, experience, and location.Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple BenefitsNote: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.EEO StatementApple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicantEEO StatementApple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicantAccessibilityAt Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.Learn about accessibility in Apple’s workplaceLearn about reasonable accommodations for job applicantsAccessibilityAt Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.Learn about accessibility in Apple’s workplaceLearn about reasonable accommodations for job applicantsApplication DeadlineApple accepts applications to this posting on an ongoing basis.Application DeadlineApple accepts applications to this posting on an ongoing basis.
$184.7k - $324.8k
...Technologies group, you’ll help design and manufacture our next... ..., power-efficient GPU! You’ll ensure Apple... ...requires a mix of strategic engineering along with hands-on experience in physical design and large chip... ...insertion, Floorplanning, Clock and Power distribution,...SuggestedTemporary workRelocation$184.7k - $324.8k
...Technologies group, you’ll help design and manufacture our... ..., power-efficient GPU. You’ll ensure Apple products... ...a mix of strategic engineering along with hands-on,... ...realizing the complete physical design verification closure... ...: multiple voltage and clock domains, ESD solutions,...SuggestedRelocation- ...challenges? As part of our Silicon Engineering group, you’ll help design and manufacture our next-... ...timing closure of highly complex GPU designs that go in every Apple product... ...including Architecture, RTL, Synthesis, Clocking, DFT, Physical design and Post silicon...Suggested
$116k - $189.75k
The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for... ...crafting all aspects of GPU and CPU clocking. The... ...collaborates with the front design team to understand the... ...team to help craft the physical floorplan of the chip. The...SuggestedFull timeWork experience placement$140k - $229.8k
...Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group >... ...candidates for several physical design engineering positions in our... ...speed, low power designs such as GPU, Camera and other MM, DDR,... ...multi-mode & multi-corner (MMMC) clock tree synthesis, routing,...SuggestedWork experience placementWork from home- ...in Austin, Texas. ASIC Block level physical design: Working on a design in GPU(Graphics Processing Unit) through... ...including Floor planning, Placement, Clock Tree Synthesis, Routing, Timing,... ...foreign equivalent in Electrical Engineering or related field and 2 years of experience...
$136k - $218.5k
...over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming... ...looking for a motivated Senior ASIC Physical Design Engineer, Netlisting to join our dynamic and... ...checking, asynchronous checking including clock domain crossing checks and MTBF analysis...Full timeShift work$136k - $218.5k
...era of computing. An era in which our GPU acts as the brains of computers,... ...are now looking for a motivated Senior Physical Design and Timing Engineer to join our dynamic and growing team.... ...synthesis, floorplanning, placement, clock-tree synthesis, routing, physical optimization...Full time$168k - $264.5k
We are now looking for a Senior Physical Design Engineer. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming... ...flow automation, chip floorplan, power/clock distribution, chip assembly and P&R, timing...Full time$168k - $264.5k
...era of computing. An era in which our GPU acts as the brains of computers,... ...is looking for best-in-class Senior Physical Design Methodology Engineer(s) - PPA Improvement Technology Scaling... ...including running chip floorplan, power and clock distribution, chip assembly and P&R,...Full time$141.91k - $232.19k
...you will have a front seat in designing the latest core IP to power... ...are not limited to:Performs physical design implementation of custom... ...synthesis, place and route, clock tree synthesis, floor planning... ...Qualifications:Bachelors in Computer Engineering or Electrical Engineering or...Full timeWork experience placementInternshipLocal areaImmediate startShift work- ...Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our... ...!Cirrus Logic is looking for an expert Physical Design Engineer to join its Implementation team... ...constraints and chip floor plan.You will analyze clock distribution on full-chip assembly....Full timeWork at officeRelocation
- ...Job DescriptionWe are looking for a Physical Design Engineer to join our Analog Backend team and work on the digital island implementation within... ...flow, including floorplanning, placement optimization, clock tree synthesis, routing, and physical verificationOptimize...
- ...: Austin Posted: 2026-01-16 Summary We are seeking a seasoned Physical Design technical leader with deep expertise in high-performance & low... ...in partition level P&R implementation including floorplanning, clock & power distribution, timing closure, and physical &...
$184.7k - $324.8k
...Description• Technical Expertise: Experience with automation for Physical Design, including block execution and using TCL and/or Python•... ...experienceFamiliar with aspects of ASIC integration, including floorplanning, clock and power distribution, global signal planning, I/O planning,...Relocation$100k
...seniorities.Tenstorrent is looking for a mid- to senior-level Physical Design Engineer with a strong background in static timing analysis (STA).... ...implementation.Experienced with timing flows, constraints, clocking, CDC, RDC, derates, uncertainties, guardbanding, and final...Permanent employment$100k
...seniorities.Tenstorrent is seeking an exceptional Senior-level Physical Design Engineer to drive top-level implementation of our complex AI and CPU... ..., implementing sophisticated floorplans, power grids, and clock networks while ensuring design closure at the chip level....Permanent employment- ...frontier intelligence. We co-design chips, racks, software, and manufacturing... ...and staffed by leading engineers, Etched is redefining the... ...inference clusters. As a Physical Design Engineer, you will own... ...floorplanning, synthesis, placement, clock tree synthesis, and routing...Full timeWork at officeShift work
- ...HardwareLocation: AustinPosted: 2026-09-14SummaryWe're seeking a Physical Design Signoff Engineer to join our team and drive the final verification stage... ...static timing analysis, signal integrity, EMIR, and clock construction and simulation, and will drive signoff...
$167.7k - $245.2k
...Switching, Routing, and Wireless products. We design networking hardware for enterprises,... ...ASICs in the industry.Your ImpactAs a Physical Design Engineer, you will play a key role in the full... ...floor planning, place and route, clock and power distribution, and timing convergence...Full timeTemporary workLocal areaWorldwideFlexible hours$128.6k - $217.2k
Senior Physical Design EngineerCategoryChip DesignLocationAustin, TXExperienceMore than 8 Years... ...are seeking a Senior Physical Design Engineer to drive Advanced Place & Route (APR) and... ...and risk assessment to advanced clock tree design and signoff—helping us deliver...Temporary workWork at officeWork from home$168k - $264.5k
...AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars... ...can make a lasting impact on the world.We are looking for a physical design engineer to be a part of NVIDIA’s physical design (PD) methodology...Full timeRemote work$198.1k - $268k
...is looking for a talented and innovative Staff Design Engineer to develop advanced power management, voltage control, clock, and reset technologies for next-generation... ...power estimation, and power modeling.Exposure to physical implementation, design for test (DFT),...Work at officeLocal area- POSITION: Physical Design Location: San Jose, CA OR Austin, TX (must work onsite at one of these locations) Responsibilities: We are seeking a Physical Design contractor with strong synthesis and implementation expertise to support large, timing-critical designs at advanced...For contractors
$100k
...much by flow maturity as by design work. This role develops, deploys... ...-to-GDSII methodology the IP physical design team runs on, so a new... ...design or CAD methodology engineer who has built flows that production... ...low-power intent (UPF/CPF), clock tree synthesis, and signoff (...Permanent employment$183k - $247.6k
Annapurna Labs designs silicon and software that accelerates innovation. Customers choose... .... We’re looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies... ...pin planning, place and route, power/clock distribution, congestion analysis, timing...Local areaFlexible hours$185.2k - $250k
...responsibilities• Work with RTL/logic designers to drive architectural... ...-area tradeoffs for physical design closure • Drive IO/Core... ...planning, place and route, power/clock distribution, congestion analysis... ...with other physical design engineers as well as with the RTL/Arch....Permanent employmentFlexible hours$100k
...target node and foundry. This role owns physical implementation of those IP blocks end... ...posting.Who You AreA hands-on physical design engineer who owns blocks end to end, with a track... ...floorplans, power grids, pin placement, and clocking strategies, and delivering IP...Permanent employment$180.2k - $270.4k
...Role and Responsibilities As a Sr Staff Physical Design PPA Engineer. you will be responsible for... ...process nodes Hands-on experience with clock tree synthesis (CTS) Sign-off experience... ...technology roadmap and deliver market-leading GPU. Our Xclipse GPU is the first mobile...Hourly payFull timeRelocation- ...shaping the future. Whether you’re designing next-gen processors, enabling... ...THE ROLE:Join an experienced physical design team working on AMD... ...with RTL design and other engineering partners throughout the project... ..., and placement through clock tree synthesis, routing, timing...
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