SoC Design Verification Engineer
Socket
Role Overview
We are looking for talented Design Verification Engineers to help verify and deliver Velaura's next generation Physical AI SoC. You will work closely with architects, RTL engineers, software engineers and system teams to establish confidence in the correctness, performance, reliability and safety of the design, from individual RTL blocks through complete hardware and software systems running real workloads.
This role focuses on system level verification. The scope spans boot and root of trust, clock and reset topology, low power behavior, and the IO and memory subsystems that carry real traffic. You will work in one or more of these areas, matched to your strengths and to program needs, and carry that work through sign off and into tape out.
Responsibilities
- Drive verification planning and execution for your assigned areas of the Velaura Physical AI SoC.
- Build and maintain SoC level simulation environments and flows for CPU based SoCs such as ARM or RISC-V.
- Verify boot flows, root of trust, security state transitions and firmware handoff.
- Verify clock and reset topology, power domains and low power behavior at system level.
- Verify IO and memory subsystem integration including PCIe and LPDDR.
- Run CDC and RDC analysis at SoC level and close findings with the design teams.
- Verify system level latency, bandwidth and QoS under representative workloads.
- Support SoC sign off criteria, coverage closure and tape out readiness.
Required Qualifications
- 10 or more years in design verification, including significant SoC level experience.
- Experience leading or participating in multiple SoC verification projects, including sign off and tape out.
- Experience with SystemVerilog, UVM, C and C++ and coverage driven verification at system level.
- Experience managing simulation flows on CPU based SoCs such as ARM or RISC-V.
- Knowledge of IO and memory subsystem IP such as PCIe and LPDDR5 or LPDDR6.
- Experience verifying boot sequences and root of trust.
- Experience verifying clock and reset topology at system level, with hands on use of CDC and RDC tools.
- Experience with low power verification tools and UPF based flows.
Preferred Qualifications
- Depth in one or more areas such as security, memory subsystem, interconnect or power management.
- Experience with HW and SW co verification and pre silicon software bring up.
- Experience with emulation and FPGA prototyping at SoC level.
- Experience with one or more of ISO 26262, IEC 61508, IEC 61511 or ISO 13849.
- Experience verifying QoS, latency sensitive or real time systems.
- Experience with post silicon bring up, debug and root cause analysis.
- Familiarity with robotics, drones, autonomous vehicles or industrial automation systems.
- Experience using AI assisted verification workflows to improve productivity and coverage.
Why Velaura?
Velaura is building next-generation compute technology for cloud, edge, and PhysicalAI. Our solutions will enable robots, autonomous systems, drones, and other intelligentmachines to operate efficiently in the physical world.
This is an opportunity to help build foundational technology at a time when the industry is undergoing fundamental change. You will work alongside experienced leaders, architects, engineers, and operators who have delivered industry-defining products across mobile, cloud, semiconductor, and AI platforms. If you enjoy solving difficult problems, working across disciplines, and helping shape thefuture of Physical AI, we would love to hear from you.
Equal Employment Opportunity and Accommodations
Velaura is an Equal Opportunity Employer that is committed to inclusion and diversity.Qualified applicants will receive consideration for employment without regard to race,color, religion, national origin, gender, sexual orientation, gender identity, disability orprotected veteran status. We also take affirmative action to offer employment
opportunities to minorities, women, individuals with disabilities, and protected veterans.
Velaura is committed to working with qualified individuals with physical or mentaldisabilities. Applicants who would like to contact us regarding the accessibility of ourwebsite or who need special assistance or a reasonable accommodation for any part ofthe application or hiring process may contact us at: View email address on click.appcast.io. This contact
information is for accommodation requests only. Evaluation of requests for reasonableaccommodation will be determined on a case-by-case basis.
- ...computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs... ...for an adaptive, self-motivated design verification engineer to join our growing team. As a key contributor, you will be part of a SOC team to drive and improve AMD's abilities...Suggested
$200k - $300k
...Design Verification Engineer We are looking for talented Design Verification Engineers to help verify and deliver Velaura's next generation Physical AI SoC. You will work closely with architects, RTL engineers, software engineers and system teams to establish confidence...SuggestedFlexible hours- ...SoC Design Verification Engineer Location: San Jose, CA Remote/Onsite: Onsite Types of Hire: Fulltime We are looking for a highly skilled SoC/Performance DV engineer to drive system-level validation and performance characterization of complex SoCs. The role...SuggestedFull timeLocal areaRemote workNight shift
$87.4k - $132k
...Position: Design Verification Engineer (eInfochips Inc) Job Description: What You'll Be Doing: Strong SV/UVM expertise AXI/NOC/Ethernet... ...for architecting Verification Environment for ASIC SoC and providing verification support from defining verification...SuggestedHourly payFull timeTemporary workWork experience placementWork at officeLocal areaNight shift$119.8k - $258k
...We are looking for a Design Verification Engineer to support SoC-level verification of advanced high-speed and security IP. This role involves close collaboration with design and architecture teams to verify complex digital systems. Responsibilities Develop and...SuggestedFull time$107.4k - $161.2k
...Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group... ..., you will define, model, design (digital and/or analog), optimize... ..., and document IP (block/SoC) development for a variety of... ...months of experience with design verification methods.Principal Duties &...Work from home- ...Silicon Technologies group, you’ll help design and manufacture our next-generation,... ...with their devices. The DFT Design Verification Engineer will be on a team which is responsible... ...experience in large processors and/or GPU/SOC designs Hands-on experience in directed...
- ...Job Title:Design Verification Engineer Location:Santa Clara CA Duration: Long term Experience:8-15 Years Description : Key Responsibilities... ...Verilog-based verification environments for IP/subsystem/SoC level testing Develop directed and random testcases,...
- ...are a part of that team there's no telling what you could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple’s premier SOCs. This is a critical job within Apple's Hardware Technology organization...
- ...Azure, and Oracle.THE PERSON:We are seeking a high‑impact Design Verification Engineer with strong technical depth, ownership, and the ability to... ...comfortable leading verification efforts across IP, subsystem, and SoC levels.You will work in a fast‑paced, highly collaborative...
$167.7k - $245.2k
...grow. Because full product development—from design to qualification to production—is within... ...Set vision and strategy for ASIC verification methodology and execution across multiple... ...expertise in multiple protocols and large-scale SoC architectures. Experience with...Full timeTemporary workLocal areaFlexible hours- ...communication for millions of users worldwide. Description As a Design Verification Engineer, you'll be at the center of our silicon design group's... ...baseband modems and RF link controllers for Apple's SOCs, you'll craft highly reusable UVM verification environments...WorldwideNight shift
- ...Job Ti tle: Design Verification Engineer Location: Sunnyvale, CA Job Type: Full-time Work Arrangement: Onsite role, Work from Client Office... .... Responsibilities: Define and implement IP/SoC verification plans, build verification test benches to enable...Full timeWork at office
$97.7k - $182.62k
...Direct message the job poster from Capgemini Engineering About the Job You're Considering Join a... ...and forward-thinking team as a Design Verification Engineer, contributing to the validation of advanced System-on-Chip (SoC) designs that integrate embedded CPUs and...16 hoursFull timeLocal area$150.4k - $225.3k
...Design Verification Engineer Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together... ...bug-free first silicon for part of the System on a Chip (SoC)/IP. Develop detailed test and coverage plans based on the...Relocation$160k - $275k
...ahead in AI quality and availability. MatX is seeking silicon verification engineers to join our team as we create best-in-class silicon for high... ...closure towards various silicon milestones including design freeze and tapeout Who You Are Concept-to-silicon experience...Daily paidFull timeWork experience placementLocal areaRemote workMonday to FridayFlexible hours- ...About Intel & Silicon ChassisIntel is seeking an Entry Level Design Verification Engineer for the Silicon Chassis team. In this role, you will... ...interconnect and chassis IPs that underpin Intel's most ambitious SoC and platform products.Position OverviewYou will work...Full timeWork experience placementInternshipLocal areaImmediate startShift work
- ...Join to apply for the Design Verification Engineer role at Quest Global Quest Global delivers world‑class end‑to‑end engineering solutions by leveraging... .... What You Will Do Verify the functional correctness of SoC, contributing to a team that writes test plans and defines...Full time
- ...to collaborate, contribute, and revolutionize AI silicon and system.DescriptionWe are looking for an experienced design verification engineer to join our SoC team at Baidu’s Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive in...Work at office
$143.8k - $230k
...supplier of state‑of‑the‑art SoC and embedded IP, is looking for... ...will join a high‑performance design team responsible for state‑of... ...Develop verification environments using modern verification... ...in Electrical and Electronic Engineering, Computer Science, or equivalent...Work experience placementLocal area$107.4k - $161.2k
...Technologies, Inc. Job Area: Engineering Group, Engineering Group... ..., you will define, model, design (digital and/or analog), optimize... ..., and document IP (block/SoC) development for a variety of... ...months of experience with design verification methods. Principal...Work from home$60k - $148.5k
...Job Title: Design Verification Engineer City: San Jose State/Province: California Posting Start Date: 9/17/26... ...with IP specifications. Collaborate with integration and SoC DV teams to validate seamless interaction of external IPs within...Minimum wageLocal area$120k - $200k
...time to value. About the team The Design Verification team works on the RDU, SambaNova's chip... ..., RTL designers, and firmware engineers, and take ownership of verification plans... ...Strong understanding of digital design, SoC architecture, and verification methodologies...Full timeTemporary workLocal areaWorldwideFlexible hours- ...Job Title Architect and create verification environments using System-Verilog and Universal verification methodology-UVM IPs and SoCs with embedded CPUs and analog mixed-signal interfaces. Develop test plans and coverage metrics from specifications and writing block...
- ...Design Verification Engineer We are seeking a skilled Design Verification Engineer to join our hardware engineering team. The ideal candidate will... ...Develop and execute verification plans for digital IPs or SoCs. Write and maintain testbenches using SystemVerilog/UVM....
- ...Design Verification Engineer Location: Sunnyvale, CA Visa Type: C2C allowed We need someone with experience either in Block or SoC level verification with hands-on on UVM / OVM and strong C/ C++ coding skills Required: ~7+ years of ASIC verification experience...
- ...WiproContact: Meghana GorusuCompany: SRI Tech SolutionsJob Title:Design Verification EngineerLcation: Sunnyvale CA /Redmond WA/ Austin TX Onsite (... ...:NO 18+ yrs profilesNo Contractors-IP level Verification - SOC Design Verification· Strong understanding of SV and UVM and...Full timeFor contractorsRemote work
$2,500 per month
...hardware for frontier intelligence. We co-design chips, racks, software, and... ...top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure... ...Job Summary We are seeking a Design Verification Engineer to join our Systems/Performance...Work at officeRelocation package- ...Job Description: NVIDIA is seeking a SoC ASIC Verification Engineer New Grad to join their elite engineering team. This role involves verifying... ...-generation CPUs. Collaborate with architects, RTL designers, FPGA, and emulation engineers to meet verification requirements...
- ...Application Engineering Application Engineering Description Chips Talk, We Listen... ...looking for a We are looking for a Senior Design Verification Engineer to join a global team of... ...Strong foundation indigital design, SoC architecture, and silicon development flows...Work at office
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to SoC Design Verification Engineer. Be the first to apply!
- asic digital design engineer Santa Clara, CA
- ic design engineer Santa Clara, CA
- product engineering manager Santa Clara, CA
- director of product engineering Santa Clara, CA
- senior software design engineer Santa Clara, CA
- product design engineer Santa Clara, CA
- senior manager product engineering Santa Clara, CA
- senior product design engineer Santa Clara, CA
- senior asic design engineer Santa Clara, CA
- senior design verification engineer Santa Clara, CA

