Senior RFIC Layout Engineer for Starshield Silicon

SpaceX is seeking a Sr. RFIC Layout Designer for the Starshield Silicon program. You will lead the discipline of layout for analog and RFIC designs, collaborating with chip designers and cross-functional teams to deliver high-performance IC blocks for space and ground applications. You will work on advanced node layouts (16nm/7nm/5nm or below), optimize for noise, matching, and parasitics, and guide layout validation, DRC/ERC, and tape-out readiness while contributing to a challenging #J-18808-Ljbffr SpaceX