Lead Firmware Engineer

Job Title: Senior FPGA Firmware Engineer - Radar Signal Processing
Job Description
This role focuses on designing, implementing, and integrating advanced radar signal processing algorithms on FPGA and SoC platforms for real-time applications. You will translate complex system-level radar requirements into efficient FPGA architectures, drive the full firmware development lifecycle, and play a key role in building and mentoring a high-performing technical team within a flexible, employee-focused environment.
Responsibilities

• Map system-level radar requirements and algorithms to efficient FPGA architectures.
• Design and implement radar signal processing algorithms in FPGAs, including pulse compression, FFT processing, CFAR detection, beamforming, and Doppler processing.
• Develop high-throughput, low-latency processing architectures for real-time radar applications.
• Implement waveform generation, digital down-conversion, and channelization within FPGA fabric.
• Design and optimize pipelined arithmetic units and custom DSP blocks for radar processing workloads.
• Interface FPGAs with high-speed ADCs and DACs to enable seamless integration with radar RF front ends.
• Validate FPGA designs using simulation and verification techniques prior to hardware integration.
• Support the full lifecycle of development and integration of FPGA firmware into hardware systems.
• Create and maintain clear design documentation, test plans, and related technical artifacts.
• Deliver technical briefings and presentations to a range of internal and external stakeholders.
• Coordinate with program leaders to plan and manage task schedules and budgets effectively.
• Participate in continuous improvement of FPGA development processes, tools, and methodologies.
• Provide mentorship and guidance to junior engineers to support their technical and professional growth.
• Contribute to building and maintaining high-performing, empowered, and collaborative technical teams.

Essential Skills

• Ability to obtain a Top Secret security clearance, which requires U.S. citizenship under U.S. Government regulations.
• Bachelor's degree with at least 7 years of applicable experience, a Master's degree with at least 5 years of applicable experience, or a PhD with at least 2 years of applicable experience; equivalent experience will be considered.
• Hands-on experience with FPGA and SoC design entry using Verilog or VHDL.
• Experience implementing digital signal processing techniques, including filter design, FFT/DFT, and fixed-point optimization.
• Experience with design flows for Xilinx and/or Intel FPGAs.
• Experience using simulation tools such as Questa, VCS, or Incisive for verification.
• Background in FPGA-based DSP, radar, and signal processing applications.
• Proficiency working with Xilinx-based platforms, including devices such as Zynq and RFSoC.
• Ability to work effectively in a collaborative team environment, often under tight deadlines.
• Demonstrated drive to take on new challenges, expand technical skills, seek greater responsibility, and increase individual impact within the organization.

Additional Skills & Qualifications

• Active security clearance at the Secret or Top Secret level.
• Proficiency with Xilinx or Altera (Intel) SoC platforms.
• Strong proficiency with FPGA or ASIC RTL design entry.
• Experience with complex timing closure and industry best practices for digital design.
• Familiarity with version control and modern configuration management practices.
• Experience with Matlab, Python, or C/C++ for modeling, analysis, or tooling.
• Experience interfacing FPGAs with high-speed DACs and ADCs.
• Knowledge of radar algorithms such as pulse compression, Doppler processing, beamforming, and detection algorithms.
• Previous experience with RFSoC devices or Analog Devices ADC/DAC solutions.
• Understanding of RF systems, particularly radar or electronic warfare (EW) systems.

Work Environment
This position offers a hybrid work environment that emphasizes flexibility and work-life balance. The organization focuses on results and supports employees in choosing an environment that helps them do their best work. You will work with modern FPGA and SoC platforms, high-speed data converters, and industry-standard simulation and development tools in a collaborative, engineering-driven culture that values technical excellence, mentorship, and continuous improvement.
Job Type & Location
This is a Contract to Hire position based out of Woburn, MA.
Pay and Benefits
The pay range for this position is $80.00 - $90.00/hr.
Eligibility requirements apply to some benefits and may depend on your job classification and length of employment. Benefits are subject to change and may be subject to specific elections, plan, or program terms. If eligible, the benefits available for this temporary role may include the following:
• Medical, dental & vision
• Critical Illness, Accident, and Hospital
• 401(k) Retirement Plan - Pre-tax and Roth post-tax contributions available
• Life Insurance (Voluntary Life & AD&D for the employee and dependents)
• Short and long-term disability
• Health Spending Account (HSA)
• Transportation benefits
• Employee Assistance Program
• Time Off/Leave (PTO, Vacation or Sick Leave)
Workplace Type
This is a hybrid position in Woburn,MA.
Application Deadline
This position is anticipated to close on Jun 1, 2026.
About Actalent


Actalent is a global leader in engineering and sciences services and talent solutions. We help visionary companies advance their engineering and science initiatives through access to specialized experts who drive scale, innovation and speed to market. With a network of almost 30,000 consultants and more than 4,500 clients across the U.S., Canada, Asia and Europe, Actalent serves many of the Fortune 500.


The company is an equal opportunity employer and will consider all applications without regard to race, sex, age, color, religion, national origin, veteran status, disability, sexual orientation, gender identity, genetic information or any characteristic protected by law.


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San Francisco Fair Chance Ordinance: Pursuant to the San Francisco Fair Chance Ordinance, for all positions located in the city and county of San Francisco, we will consider for employment qualified applicants with arrest and conviction records.



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Use of Artificial Intelligence (AI): We may use Artificial Intelligence (AI) to support parts of our hiring process, including sourcing, screening, and evaluating candidates. AI helps assess applications and qualifications, but final decisions are made by our hiring team. By applying, you acknowledge and agree that your application may be reviewed using AI tools.