Senior Member of Technical Staff, AI‑Optimized DRAM Architect

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Interested in changing the landscape of artificial intelligence workloads? Join our team where we are building next-generation, high-performance memory solutions for AI. In Micron's AI-optimized Memory Architecture organization, we partner closely with customers to design and deliver memory solutions purpose-built for emerging AI systems and applications. As a Senior Member of Technical Staff in the AI-optimized Architecture team, you will drive the architecture of tightly coupled, high-performance memory architectures for AI workloads. Apply expert knowledge to optimize DRAM architectures and designs for maximum performance, power, and area (PPA). This role is ideal for memory designers experienced with DRAM to identify, architect, design, and simulate next-generation architectures and memory features in collaboration with experts in physical architecture, memory systems architecture, and SoC microarchitecture. Responsibilities Identify and develop novel DRAM circuit architectures that anticipate next-generation AI workload requirements, to unlock improvements in bandwidth and energy efficiency. Collaborate with peer architects to identify the highest-leverage DRAM circuit bottlenecks and define architectural hypotheses. Validate architectural hypotheses through schematic-level circuit design, SPICE simulation, and tradeoff analysis, establishing PPA feasibility. Partner with layout designers to conduct floor planning studies. Collaboratively define and optimize design-for-test, design-for-yield implementation. Compose and maintain clear specifications and architecture documentation. Required Qualification Strong mixed signal design experience, including experience with custom analog and synthesis flows. DRAM circuit design experience across a wide breadth of focus areas: cell arrays, sense amplifiers, row/column decoders, periphery, IO, power distribution and delivery. Extensive engineering experience with SPICE-based tools (e.g., FineSim, HSPICE). Experience in one or more programming languages (e.g., Python, C/C++) and hardware description language (e.g., Verilog). Strong knowledge of semiconductor device physics. Strong communication skills with an ability to influence others through deeply technical, data-driven analysis. Preferred Qualification Experience with HBM or other novel stacked memory architectures. A Masters or PhD in Computer Science, Computer Engineering, Electrical Engineering, or equivalent experience. 10+ years of proven industry experience delivering DRAM-based memory designs. As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits. Micron is proud to be an equal opportunity workplace and is an affirmative action employer. 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