Senior FPGA Engineer, Real-Time Video & Camera Pipeline

Job Description

Job Description

Own the FPGA at the heart of a brand-new class of 3D cameras: the real-time image pipeline from sensor to
system.

ABOUT THE COMPANY

We are a stealth-stage technology and tools company founded by one of the most influential figures in the
history of 3D and stereoscopic filmmaking. Our mission is simple to say and hard to do: make shooting in native
3D as routine and affordable as ordinary 2D, across film, television, live events, and sports, built on three
decades of the most advanced stereoscopic technology ever put on screen.

Two recent milestones accelerate the work. We acquired a world-renowned precision 3D-camera and
stereography team whose rigs are behind some of the most technically ambitious films of the past decade. And
we entered a multi-year partnership with one of the world's largest technology platforms to bring native 3D
content to a leading immersive headset.

We are a small, focused team about two years into active R&D, designing custom 3D camera and production
hardware end to end, including cameras engineered for environments most electronics never survive, from
underwater to extreme-condition shoots. This is genuine ground-floor work, and what you build here will show
up on the largest screens in the world.

ABOUT THE ROLE

You will own the FPGA at the heart of our camera systems: the logic that pulls massive streams of image data off
high-resolution sensors and moves it through the system in real time, cleanly, in sync, and with nothing
dropped. This is professional video and imaging work first. You will build the real-time picture pipeline that
carries native 3D image data from the sensor, through the FPGA, and out to the rest of the system, in hardware
built for punishing environments.

This is hands-on work on a small team. You will design the logic, bring it up on real hardware, and work shoulder
to shoulder with the board, firmware, and software engineers.

WHAT YOU'LL DO
• Design real-time video and image data paths in FPGA: capturing high-bandwidth data off the sensor, moving
pixels through the system with no dropped frames and no stalls.
• Connect the sensor side to the output side, wiring high-speed sensor interfaces (MIPI and similar) through to
the transport that carries the picture out of the camera.
• Own timing and synchronization across multiple sensors so the left and right 3D streams stay perfectly
locked together, frame to frame.
• Integrate the high-speed networking that carries image data across the system (high-bandwidth Ethernet,
increasingly available as built-in hard IP on the chip), and bring up the serial links and SFP connections that
move it, including over long, demanding cable runs.
• Debug real video, timing, and data-path issues on live hardware, and partner closely with the PCB, firmware,
and software engineers.
• Help shape the architecture of next-generation systems and the choice of FPGA platform.

WHAT WE'RE LOOKING FOR
• Several years (roughly 5 to 10) of FPGA development focused on real-time video or image pipelines, moving
high-throughput picture data through hardware, not general-purpose logic or slow control work.
• Hands-on experience building real-time video or image-processing data paths in FPGA, ideally in professional
video, camera, or broadcast systems. This is the heart of the role and what we care most about.
• Comfortable with professional video and high-speed sensor interfaces (MIPI and similar), and moving highbandwidth pixel data through hardware in real time.
• Strong with timing, synchronization, and managing many clock domains, keeping multiple high-rate streams
aligned frame to frame.
• Comfortable integrating high-speed networking to carry image data across the system (high-bandwidth
Ethernet at 25 gigabit and beyond). You do not need to have built a custom packet engine from scratch;
increasingly this comes as hard IP on the chip, and the work is integrating it and getting the data to it cleanly.
• Real experience bringing up and tuning high-speed serial links (link bring-up, signal integrity, getting the
channel to close cleanly).
• Comfortable owning a design end to end, from architecture through hardware bring-up, and chasing down
the hard problems on real hardware.
• Solid RTL skills (VHDL, Verilog, or SystemVerilog), and enough scripting (Python, C or C++) to build your own
tooling.
• Low ego, high ownership. On a small team, nothing is beneath this role.

NICE TO HAVE
• 3D or stereoscopic imaging, or light-field, volumetric, or multi-camera work.
• Deep high-speed networking on FPGA (custom packet engines, Ethernet MAC, efficient zero-copy DMA) for
cases where the transport is built in fabric rather than dropped in as hard IP.
• Precision timing and synchronization standards.
• Experience in film, broadcast, or live-event technology.
• Startup or ground-floor R&D experience where you owned the full arc from architecture through bring-up.

LOCATION & LOGISTICS
South Bay, Los Angeles. On-site 3 to 4 days per week, with flexibility around build and test cycles. Full-time and
permanent, a ground-floor role on a small team that is growing. We are an equal-opportunity employer and
value a diverse, high-ownership team.

Why this matters. Every frame that reaches the screen moves through the logic you design. If the picture does
not move cleanly, in sync, and on time, nothing downstream works. This is the real-time image pipeline of
cameras that do not exist yet.