Sr. Principal Digital Engineer

RELOCATION ASSISTANCE: No relocation assistance availableCLEARANCE REQUIRED FOR START: YesCLEARANCE TYPE: SecretTRAVEL: Yes, 10% of the TimeDescriptionAt Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.Northrop Grumman Mission Systems (NGMS) is seeking a Sr. Principal Digital Engineer with the desire to learn new technologies to join our innovative Software and Digital (SWDT) Technologies Organization to help develop, enhance and maintain software on cutting edge products and systems. This position may be based out of Linthicum, MD or Morrisville, NC.What You'll Get To Do:As a Sr. Principal Digital Engineer within the SWDT Organization you will have a challenging and rewarding opportunity to be a part of our Enterprise-wide digital transformation. Using the latest Digital development tools, and Agile practices we continue to evolve how we deliver critical national defense products and capabilities for the warfighter. Our success is grounded in our ability to embrace change, move quickly and continuously drive innovation. The new team member will be collaborative, open, transparent, and team oriented with a focus on team empowerment & shared responsibility, flexibility, continuous learning and a culture of automation.Roles and Responsibilities:Design, verification, simulation and testing of FPGAs.Utilize modeling and simulation tools to expedite development and testing of firmware updates.Develop test plans and implement rigorous testing and validation processes for digital designs to ensure functionality, performance and security requirements are met.Adhere to coding standards, revision control practices, and peer review procedures.Conduct tests using high-speed oscilloscopes, signal generators, signal analyzers, and FPGA debugging tools, and analyze test data.Create engineering change orders and perform fundamental types of analysis (i.e. power utilization, signal integrity, etc.).Providing support for Systems Integration and Test operations.Lead on-site testing of digital designs.Manage design constraints (timing, power, I/O) and perform static timing analysis to meet critical performance targets.Use strong interpersonal skills to work effectively within a development team to understand system level interdependencies that impact circuit requirements and design constraints."This position is contingent on contract award and funding."Basic Qualifications for a Sr. Principal Digital Engineer:Bachelor's Degree in Computer Engineering (BSCE), Electrical Engineering (BSEE) or related STEM Degree with 7 years of related experience.U.S Citizenship is required.Must be able to obtain a Secret Clearance. Secret Clearance is required to start. Must be able to maintain this level of clearance for continued employment.Must have 5 years of experience with VHDL programming language.Must have 5 years of experience working in schematic and programmable logic tools such as AMD/Xilinx, Vivado, Altera/Quartus, etc.Demonstrated ability to work independently, taking initiative to complete tasks with minimal supervision while contributing to team success.Must have 5 years of experience with firmware development: specification, design, implementation, integration, debug and maintenance.Preferred Qualifications:Master's Degree in Computer Engineering (MSCE), Electrical Engineering (MSEE) or related STEM Degree with 8+ years of related experience.Knowledge of timing constraints and achieving timing closure.Experience in real-time embedded firmware development knowledge of Radar, Electronic Warfare, or Space technologies.Proficiency with schematic and programmable logic tools such as AMD/Xilinx, Vivado, Altera/Quartus, etc.Proficiency in a Department of Defense (DoD) environment.Ability to collaborate in a team environment.Experience working in a lab/testing environment.Primary Level Salary Range: $149,300.00 - $223,900.00The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions.Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.

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