Principal / Senior Principal - SoC / RTL Low-Power Expert (Santa Clara)
$182.36k - $273.2kMarvell
About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your ImpactMarvell Custom Solutions develops cutting-edge solutions for large AI, cloud data center, and telecom customers. The SoCs encompass best-in-class performance, advanced die-to-die and packaging technology, and optimized low-power techniques.We are seeking a SoC / RTL Low-Power Expert who serves as the final technical authority for power behavior across the full silicon lifecycle. This role owns power architecture, RTL power intent, estimation, correlation, and power sign-off, including situations where specifications or workloads are evolving.This team hires some of the biggest problem solvers in Silicon and has a huge impact on the work done at Marvell. The customers served by this team are often other chip companies and big tech companies, familiar names to all candidates.What You Can ExpectOwn SoC and subsystem power architecture and power tradeoffsLead and enforce low-power RTL design practicesDrive RTL and early power estimation with realistic workload assumptionsOwn power correlation across RTL, gate, and post-PnR stagesServe as final escalation point for power issuesMake and defend power sign-off and tape-out decisionsSupervise or mentor other digital design engineers.What We're Looking ForBachelor’s degree in Computer Science, Electrical Engineering or related fields and 10-15 years of related professional experience. OR Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 5-10 years of experience.Deep expertise in SoC / RTL low-power designProven ownership of power closure on large designsAbility to predict power behavior and risks before tool analysisExperience resolving conflicting power data across design stagesTrusted technical authority across architecture, RTL, verification, and physical designExpected Base Pay Range (USD)182,360 - 273,200, $ per annumThe successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.Additional Compensation and Benefit Elements Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at View email address on apply.placed-app.com Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.#LI-TM1SummaryLocation: US-CA - Santa ClaraType: Full time
$200k - $250k
...Job Title: Principal RTL Design Engineer - PCIe / CXL / High-Speed SoCLocation: Santa Clara, CACompensation: $200K - $250K base DOE plus bonus... .../ UALink, High-Speed SoC DesignPosition OverviewAs a Sr... ...high-performance ASICs that power industry-leading products for...PrincipalPart time$224k - $356.5k
...impact on the world.We are looking for a senior SoC/Product Architect to define and drive the architecture of next-generation low-power SoCs at NVIDIA. You will own concept-to-... ...protected by law.SummaryLocation: US, CA, Santa Clara; US, WA, SeattleType: Full time...SuggestedFull timePart time$272k - $431.25k
...between architecture, RTL implementation, and physical... ...as subject matter expert on power delivery/regulators, power... ...design.Well versed in low power techniques that... ...design.Knowledge of GPU and SOC design.Experience of... ...: US, CA, Santa Clara; US, TX, Austin; US, OR...PrincipalFull timePart time$164.47k - $269.1k
...systems.We are seeking a Senior SoC Chiplet Architect... ...performance, power, area (PPA), cost/yield... ...high bandwidth, low latency, and reliability... ...architecture, RTL, DV, FW/SW, packaging... ...: US, California, Santa ClaraAdditional Locations... ...California, Santa Clara; US, Colorado, Fort...SeniorFull timePart timeLocal areaImmediate startShift work$220.92k - $311.89k
...Description: Intel’s AI SoC organization... ...cutting-edge products powering a wide range of AI... ...OverviewAs a Lead Senior Design Engineer – AI... ...Microarchitecture & RTL Development: Define... ...in high-speed and low-power design techniques... ...:US, California, Santa Clara, US, Texas,...SeniorFull timePart timeLocal areaImmediate startShift work$188k - $325k
...industries and give customers the power to shape their markets.... ..., leading and owning RTL development of a performance efficient, low-power CPU core. The... ...PythonUnderstanding of CPU integration at SoC levelUnderstanding of... ...law SummaryLocation: Santa ClaraType: Full time...PrincipalSeniorFull timePart timeLocal area$191.53k - $286.9k
...technology teams.As a Senior Principal Memory Architect, you... ...subsystem solutions that power cutting-edge data... ...close collaboration with RTL, physical design, and... ...100% in-office at our Santa Clara, Irvine or Boise locations... ...or high-performance SoC designs.Soft Skills:...PrincipalSeniorPermanent employmentPart timeInternshipWork at officeRemote workWork from home$182.36k - $273.2k
...demanding performance, speed, power and latency requirements of the... ...micro-architecture and RTL for complex power management integrated... ..., Synthesis, STA, low power design, Spyglass and Quality... ...prior to employment.#LI-JT2SummaryLocation: Santa Clara, CAType: Full time...PrincipalSeniorPermanent employmentFull timePart timeInternshipWork from home$200k - $250k
...Job Title: Principal Design Verification Engineer - PCIe... ...High-Speed SoCLocation: Santa Clara, CACompensation: $200K... ...Verification, High-Speed SoC, PCIe / UALink / SerDes... ..., error handling, and power/clock domain... ...collaboration with architects, RTL designers, firmware/driver...PrincipalPart time$168k - $264.5k
...Group is looking for a versatile engineer to help redefine how low-power silicon validation and system bring-up are developed for next-generation... ...veteran status, disability status or any other characteristic protected by law.SummaryLocation: US, CA, Santa ClaraType: Full time...SeniorFull timePart timeWorldwide$272k - $431.25k
...NVIDIA is seeking a Principal SoC Architect to join our architecture team... ...and system architectures that power the world’s most advanced autonomous... ...feature sets tailored for low-latency robotics spatial... ...protected by law.SummaryLocation: US, CA, Santa ClaraType: Full time...PrincipalFull timePart time$184k - $287.5k
...architecture team as a Senior System Simulation... ...frameworks with RTL simulators and emulators... ...simulators and/or low-level software (OS,... .... Our technologies power transformative... ...world-class GPUs and SoCs. These CPUs play a... ...SummaryLocation: US, CA, Santa Clara; US, TX, Austin; US...SeniorFull timePart time$182.5k - $260.5k
...company and an award-winning culture powered by hundreds of employees spread across offices in Santa Clara, St. Louis, Bangalore, London,... ....Positions are available at Senior Staff and above. Candidates are... ...comfort reaching into C++ for low-level interop is a plus.Solid...PrincipalSeniorPart timeWork at office$164.47k - $269.1k
...computing systems.We are seeking a Senior SoC Compute/Memory Subsystem... ...level performance, scalability, power efficiency, and... ...Primary Location: US, California, Santa ClaraAdditional Locations:US,... ...SummaryLocation: US, California, Santa Clara; US, Colorado, Fort Collins; US...SeniorFull timePart timeLocal areaImmediate startShift work$168k - $264.5k
...through collaboration with RTL, synthesis, DFT, foundry, timing... ..., Network processors and SOC, with emphasis on PPA (Power, Performance, Area) and... ...improvement on high performance and low power designs in advanced... ....SummaryLocation: US, CA, Santa Clara; US, TX, Austin; US, TX,...SeniorFull timePart timeRemote work$177.82k - $266.4k
...foundational to Marvell's growth in networking, connectivity, and AI infrastructure.What You Can ExpectAs Senior Principal Engineer for Signal Integrity and Power Integrity, you will be the senior technical authority responsible for ensuring that customer platforms built...PrincipalSeniorPart timeInternshipWork from home- ...unleashing the potential of generative AI to power the transformation of technology. We are... .... Location:Hybrid, working onsite at our Santa Clara, Ca headquarters 3-5 days per week.What... ...design. The responsibility includes both RTL power estimation as well as Physical...SeniorPart time3 days per week
$184k - $287.5k
...networking equipment that enable the most powerful super computers in the largest data... ...with multiple programming languages (from low-level C programming language to high-level... ...by law.SummaryLocation: US, CA, Santa Clara; US, TX, Austin; US, WA, RedmondType: Full...SeniorFull timePart timeRemote work$300k
...of performance, density, and power efficiency. This wouldn’t be possible... ...industry. We’re looking for a Senior Signal Integrity / Power... ...Design team at our headquarters in Santa Clara, CA. In this role, you’ll work... ..., backplane concepts, and low-loss interconnect topologies...SeniorContract workPart time$135.9k - $201.13k
...Your ImpactAs a Senior Staff Digital... ...high bandwidth, low latency data movement... ...closely with experts in architecture... ...solutions powering the global AI infrastructure... ...to define SoC‑level... ...IP blocks.Own RTL development for... ...Irvine, CA; US-CA - Santa Clara - BKH; US-CA -...SeniorPermanent employmentFull timePart timeInternshipWork from home$168k - $264.5k
...We are now looking for a motivated Senior Circuit Design Engineer in Power Modeling and Simulation to join... ..., Spice, verilogAMS, mixed-signal RTL+spice, s-parameters, etc.Familiarity/experience... ...by law.SummaryLocation: US, CA, Santa Clara; US, CA, RemoteType: Full time...SeniorFull timePart time$168k - $264.5k
...team that gets every GPU, SoC, and CPU silicon program from first power-on to high-volume... ...markets.We are hiring a Senior Silicon Power and Thermal... ...datacenter accelerators to low-power client devices.Partner... ...law.SummaryLocation: US, CA, Santa ClaraType: Full time...SeniorFull timePart timeShift work$272k - $431.25k
...are looking for a Principal System Architect with... ...System-on-Chip (SoC) platforms. The... ...communication skills. This senior technical position... ...Perform and guide power and performance... ....Collaborate with RTL, verification,... ...SummaryLocation: US, CA, Santa Clara; US, OR, Hillsboro...PrincipalFull timePart timeRemote work$200k - $300k
...Job Title: Principal ASIC Architect - Memory Systems &... ...InterconnectsJob Location: Santa Clara, CA or Boston,... ...generation AI accelerators and SoCs. The role combines deep... ...define high-bandwidth, low-latency solutions that... ...decisions.Collaborate with RTL, verification, firmware...PrincipalPart time$220.92k - $311.89k
...shaping how we deliver power, performance, and... ...'re looking for a Principal Engineer who... ...high-performance and low-voltage operation,... ...across CPU, GPU, or SoC design teams.Publications... ...: US, California, Santa ClaraAdditional... ...California, Santa Clara; US, Oregon, Hillsboro...PrincipalFull timePart timeLocal areaImmediate startShift work$100k
...looking for contributors of all seniorities.We are looking for a talented... ...team to define and implement RTL for high-performance CPUs.... ...deliver a functional, timing, and power-converged design.This role... ..., based out of Austin, TX or Santa Clara, CA.We welcome candidates at...SeniorPermanent employmentPart time$100k
...contributors of all seniorities.Tenstorrent is... ...lead post-silicon power characterization and... ...or Austin, TX or Santa Clara, CA.We welcome candidates... ....Who you areA Principal-level engineer... ...pre-silicon models (RTL, gate-level, sign-... ...state-of-the-art SoCs behave in real silicon...Permanent employmentPart time$135.2k - $306.4k
...concentrating our expertise on building low level systems with high... ...from scratch and work with senior architects and leaders at OCI.... ...applications, and expertise to power everything from industry... ...and vision insurance, including expert medical opinion2. Short term disability...PrincipalSeniorTemporary workPart timeWork experience placementWorldwideFlexible hours$100k
...for contributors of all seniorities.We are seeking a junior-to-mid level SOC Emulation Engineer to support... ...is hybrid, based out of Santa Clara, CA or Austin, TX.We... ...navigate SystemVerilog RTL.Skilled at using modern... ...high-level software to low-level firmware, to solve...Permanent employmentPart time- ...potential of generative AI to power the transformation of... ...AI. Location: Hybrid (Santa Clara, CA)The role:... ...engine. We are seeking SoC Architect to lead our SoC... ...Architecture in conjunction with RTL & DV engineers of... ...Development of SoCs.· Expert knowledge of AI SoC Architecture...Part timeNight shift
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